Verification Academy Live: Austin

Agenda

9:30 AM – 10:00 AM

• Registration and Check-in
  • Coffee and networking with your peers

10:00 AM– 10:05 AM

• Welcome and Introductions
  • Mel Pratt | Sr. Application Engineering Manager, Functional Verification

10:05 AM – 11:00 AM

• KeyNote: Smart Verification – Faster is not Enough!
  • Abhi Kolpekwar | VP & GM, Digital Verification Technologies Division
    The electronics industry is on the brink of an unprecedented paradigm shift. The AI/ML-focused chips account for 20% of the semiconductor market, a figure set to skyrocket to 73% by 2030, fueled by the ongoing digital transformation. This seismic shift will significantly impact the architecture, design, and manufacturing of computing, networking, and communication solutions, necessitating careful consideration of power, performance, security, and safety concerns. Conventional verification flows, reliant on disparate point tools, will struggle to meet the demands of emerging systems. This keynote explores the prevailing macro-trends shaping today's digital transformation before outlining a visionary approach to functional verification. By leveraging collective wisdom across tools, technologies, workflows and methodologies, this new paradigm promises productivity gains beyond the reach of traditional methods.

11:00 AM - Noon

• Questa Verification IQ: Boost verification predictability and efficiency with Big Data
  • Ahmed ElKady | Product Engineer
    This session will cover Questa Verification IQ (VIQ), the next-generation, data-driven verification solution from Siemens EDA that transforms the verification process using analytics, collaboration, and traceability. VIQ utilizes machine learning to boost.

Noon – 12:45 PM

• Lunch and Networking

12:45 PM - 1:15 PM

• Questa Verification IQ: Sneak Peek of Debug IQ and Regression IQ
  • Continuation of Questa Verification IQ session.

1:15 PM - 2:00 PM

• The New Leader in Verification IP: Questa + Avery Solutions
  • Luis Rodriguez | Senior Technical Product Manager & VIP Architect
    Now that our acquisition of Avery Design Systems is complete, Siemens EDA is the new leader for Verification IP in the industry. This session will describe the protocol and memory verification solutions you need for your next silicon verification project whether in Datacenter, Storage, 3DIC, Networking, Automotive, or Aerospace and Defense applications.

2:00 PM- 2:30 PM

• Capturing Additional DFT Coverage thru Functional Fault Grading
  • Byron Brinson | Product Engineer
    Ideally, for manufacturing test coverage the goal is to achieve 100%. This becomes even more important for chips used in safety critical applications. However, there are usually limitations regarding the amount of coverage that the DFT infrastructure can provide within a chip. Functional Fault Grading provides a methodology to capture additional manufacturing test coverage without modifying the existing DFT architecture.

2:30 PM- 3:00 PM

• Accelerating Verification Closure with Siemens DFT Tailored Verification Solutions
  • Rick Koster | Product Engineer
    As semiconductor designs evolve to more complex architectures, 3DICs, and heterogeneous integration, verification engineers face increasing pressure to accelerate DFT verification closure. Siemens offers a comprehensive technology suite tailored to industry leading Tessent solutions, designed to address the growing complexity and growing challenges in Design for Test (DFT) verification. This session details how Siemens DFT centric verification technology tackles these challenges by providing a unified platform streamlined to Tessent flows, delivering industry leading performance and enhanced user experience, accelerating DFT verification closure while reducing cost and risk to reach DFT sign-off.

3:00 PM- 5:00 PM

• TopGolf happy hour and networking

** SEATING IS LIMITED, register below to save your seat.

Date & Time

Wednesday, November 6th
9:30 AM - 5:00 PM

Location

TopGolf
2700 Esperanza Crossing
Austin, TX, 78758
+1 (512) 222-5950

<sup><sub>PLEASE NOTE:
- This event is in-person only -- there is no support for remote participation.</sub></sup>