FPGA Webinar

Wednesday, Jul 22nd-8:00 AM PDT

Full Spectrum Equivalence Checking: From C++ to the FPGA Bitstream

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DAC 2026: Booth #1327

July 26th - July 29th

Visit Siemens EDA at DAC 2026 to view our software-defined, AI-powered and 3D IC solutions in Long Beach, CA.

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DAC 2026: Exhibitor Forum

Monday, Jul 27th-12:00 PM PDT

Intelligence Between the Runs: Agentic AI for Feedback-Driven Verification

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DAC 2026: Technical Session

Tuesday, Jul 28th-5:00 PM PDT

Agentic AI and the Rise of the Design and Verification Scientist

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New White Papers

Agentic AI, Avery VIP, Coverage, Formal Verification, Functional Safety, UPF and More!

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SIEMENS Verification Academy

Faster Debug Using QuestaSim Interactive Coverage Analysis

This session we will explore the power of debugging code and functional coverage while simulation is still running. Learn how interactive coverage analysis brings another dimension to RTL and SV/UMV debugging which can lead to significant productivity boost and faster design and testbench bring up.

Justin Royse

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