1. Session Slides

    Session Title

    Abstract

    Slides

    The AI-driven Verification Revolution: From Embedded Intelligence to Agentic Sign-Off

    - Moses Satyasekaran - Siemens EDA
    This session will provide a comprehensive overview of the Siemens EDA AI story, tracing the evolution from embedded 'Smart Verification' features to enterprise-scale agentic orchestration. It will show the disruptive characteristics of these technologies on design methodology, demonstrating how AI-embedded engines for creation, simulation, and debug are now being unified under a single agentic framework. PDF
    Questa One Static Formal Verification

    - Karu Karunakaran - JHU APL
    This session will present static & formal verification for RTL and FPGA teams. A practical introduction to the portfolio, analysis flow, result semantics, debug, and deployment. -
    Questa Property Assist: AI Enabled Acceleration Tool for Early Verification of Digital Designs

    - Afzal Usmani - NGC
    - Grace Fieni - NGC
    This session will talk about the application of the tool on a newly designed digital module, as well as the benefits and challenges faced by using the tool. It will also present some suggestions to make improvements to the tool. PDF
    Questa One Software-Aware Verification IP: Simplifying HW/SW Co-Simulation for Faster, More Reliable SoC Validation

    - Alaa Abdelmoaty - Siemens EDA
    This session explores Avery Software-Aware VIP (SAV), a software-aware verification approach that integrates QEMU and Arm Fast Models with virtualized SoC environments to deliver realistic software stimulus before silicon availability. PDF