Running Questa CDC on FPGA Designs
This application note describes how to analyze clock-domain crossings in FPGA designs using Questa CDC.
The process includes:
- Exporting FPGA project file
- Using the correct FPGA library files
- Compiling the FPGA libraries
- Compiling the design files
- Running CDC static analysis
- Reviewing and debugging the static analysis results
This application note describes how to run CDC analysis in batch mode using a Makefile or shell scripts.
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