What are the various approaches for verifying a design that contain an ARM processor like A9,A72,R5 etc in UVM?

Hi ,
I have worked on couple of projects (ASIC/FPGA) that contained a processor in the design. The approaches that I have seen so far are using UVM , C, QEMU, basically using C, QEMU in an SV environment. However I would like to know more about this area. Can someone point to some links where I can find good papers on this topic?
Thanks!