Generative AI for Chip Design
This session explores Questa One Agentic Flows, showcasing how AI-driven automation is transforming both simulation and formal verification workflows. We will dive into how engineers can leverage intelligent agents to streamline traditionally manual and iterative tasks across RTL development, assertion creation, and verification closure. Attendees will earn how to leverage AI to automate RTL & SVA generation, fix issues identified by Lint and CDC, and automate simulation/formal tasks and works.
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