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September 2021 - Volume 17 Issue 2 (12)

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July 2020 - Volume 16 Issue 2 (7)

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December 2019 - Volume 15 Issue 3 (5)

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November 2018 - Volume 14 Issue 3 (4)

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July 2023 - Volume 19 Issue 2 (3)

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June 2017 - Volume 13 Issue 2 (2)

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June 2012 - Volume 8 Issue 2 (1)

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July 2022

Getting to Know Visualizer - Part II
Debug Jul 05, 2022 Rich Edelman Article
Unblocking the Full Potential of SSDs Using Zoned and Key Value Namespaces
Verification IP Jul 05, 2022 Himani Kaushik - Siemens Eda Article
Bringing 5G NR Radio Frame Generation and Analysis to the Veloce® X-STEP™ Product Family
Acceleration Jul 05, 2022 Yrjö Keränen - Siemens Eda Article
Speeding OTN Verification Using Emulation
Acceleration Jul 05, 2022 Pradeep Gupta, Saurabh Khaitan - Siemens Eda Article
Reflections on Users’ Experiences with SVA - Part II
SystemVerilog Jul 05, 2022 Ben Cohen Article
Easy Testbench Speedups
SystemVerilog Jul 05, 2022 Eileen Hickey - Doulos Inc. Article
Functional Safety Verification Challenges for Automotive ICs
Functional Safety Jul 05, 2022 Mihajlo Katona - Veriest Article
The Path to a Safety Mechanism on an Unsafe PCIe® Sub-Module
Functional Safety Jul 05, 2022 Avnita Pal - Silicon Interfaces Article

March 2022

NVMe-oF – Simple, Invisible Fabric to Cloud Storage
Verification IP Mar 02, 2022 Dhruv Garg - Siemens Eda Article
Getting to Know Visualizer - Part I
Debug Mar 02, 2022 Rich Edelman Article
Enabling Model-Based Design for DO-254 Certification Compliance
Functional Safety Mar 02, 2022 Jacob Wiltgen Article
How Do You “Qualify” Tools for DO-254 Programs?
Functional Safety Mar 02, 2022 Michelle Lange, Tammy Reeve - Patmos Engineering Services Article
Reflections on Users’ Experiences with SVA
SystemVerilog Mar 02, 2022 Ben Cohen Article
A Faster Approach to Co-Simulation Using Questa and VPI
Simulation Mar 02, 2022 Vicente Bergas, Andrew Robertson, Marco Denicolai - Bitec Article
UVVM – VHDL Verification Methodology for Faster and Better FPGA and ASIC Verification
VHDL 2008 Mar 02, 2022 Espen Tallaksen - Emlogic Article

February 2022

Controlling On-the-Fly-Resets in a UVM-Based AXI Testbench
Simulation Feb 02, 2022 Verification Horizons Article

September 2021

What Siemens’ Acquisition of OneSpin Means for Formal Verification – and You
Formal Verification Sep 01, 2021 Tom Fitzpatrick Article
Digital Thread, Digital Twin, and IC Development
Functional Safety Sep 01, 2021 Ray Salemi Article
Addressing the Trends and Challenges of Automotive IC Development
Functional Safety Sep 01, 2021 Ann Keffer Article
Deploying HLS in a DO-254/ED-80 Workflow
Functional Safety Sep 01, 2021 Tammy Reeve - Patmos Engineering Services Article
Hardware-Assisted Verification Through the Years
Acceleration Sep 01, 2021 Jean-Marie Brunet Article
Veloce Hardware-Assisted Verification – Complete, Unified, and Progressive
Acceleration Sep 01, 2021 Jean-Marie Brunet Article
Veloce Prototyping Solutions Accelerate Verification of HPC AI-Enabled SoCs
Acceleration Sep 01, 2021 Stephen Bailey Article
"Hug the Debug" – Before It’s Too Late
Debug Sep 01, 2021 Sumit Vishwakarma Article
Questa Visualizer Adds Coverage Analysis to the Platform
Debug Sep 01, 2021 Yara Esam - Siemens Eda Article

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

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Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs

Siemens EDA Automotive TechDay

Tuesday, September 24th | Audi Conference Center | Munich, Germany

DVCon India 2024

September 18th -19th | Radisson Blu Hotel | Marathahalli, Bangalore

Osmosis 2024

Thursday, October 17th | Holiday Inn City Center | Munich, Germany

Browse all content in Siemens Verification Academy with the tag verification horizons

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