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2390 Results

  • The 2026 Functional Verification Study: Evidence of a New Verification Operating State

    We have released the results of the  2026 Siemens EDA and Wilson Research Group Functional Verification Study . In previous years, we published separate IC/ASIC and FPGA reports. For 2026, we expanded that approach into a broader research collection: four focused whitepapers, a methodology reference paper, and a Functional Verification Data Atlas containing the supporting findings and historical trends. There is a lot of data in this year’s study. But one result is difficult to ignore.

  • 2026 Siemens EDA and Wilson Research Group Functional Verification Study

    The 2026 Siemens EDA and Wilson Research Group Functional Verification Study examines how today’s increasingly software-driven and interconnected designs are reshaping functional verification.

  • 2026 Functional Verification Study: Executive Findings

    Get an overview of the current industry baseline, participant profile, six headline findings, and their principal implications for functional verification.

  • 2026 Functional Verification Study: Executive Findings

    This video explores the key findings from the 2026 Functional Verification Study: Executive Findings white paper, which depicts an industry where processor-rich and accelerator-class designs, software-driven functionality, safety and security requirements, and increasingly complex system interactions are reshaping the nature of functional verification.

  • 2026 Functional Verification Study: Executive Findings

    This paper reveals an industry in which processor-rich and accelerator-class designs, software-driven behavior, safety and security requirements, and increasingly complex system interactions are reshaping functional verification. First-silicon success continues to decline, FPGA production bug escapes have risen, verification consumes roughly half of project time, and most projects are behind schedule.

  • Five Signals from the 2026 Functional Verification Study

    This video explores the key findings of the Five Signals from the 2026 Functional Verification Study white paper, which suggests that the IC verification challenge is undergoing a fundamental transformation. The data shows that verification is no longer simply becoming more complex.

  • Five Signals from the 2026 Functional Verification Study

    The forthcoming 2026 Siemens EDA and Wilson Research Group Functional Verification Study indicates that the IC verification problem is changing in nature, not simply growing in complexity.

  • Five Signals from the 2026 Functional Verification Study

    Explore five connected trends shaping functional verification, including alternative explanations, interpretation guardrails, respondent-vantage considerations, and the industry’s shift toward building system confidence in executable systems.

  • AI in Functional Verification: What the 2026 Industry Data Reveals

    Learn where AI is being applied within functional verification, how broadly it is integrated into engineering workflows, and where adoption remains limited.

  • AI in Functional Verification: What the 2026 Industry Data Reveals

    This video explores the key findings from the AI in Functional Verification: What the 2026 Industry Data Reveals white paper. For the first time, the 2026 Siemens EDA and Wilson Research Group Functional Verification Study provides industry data on AI/ML adoption in functional verification. Among 604 participants, 82.8% report use beyond evaluation or pilot projects, yet only 9.0% describe AI as broadly integrated across the verification flow.

  • AI in Functional Verification: What the 2026 Industry Data Reveals

    For the first time, the 2026 Siemens EDA and Wilson Research Group Functional Verification Study provides industry data on AI/ML adoption in functional verification. This paper reports on these findings, examining applications, benefits, and barriers to adoption. Leading applications of AI are debug and root-cause analysis, testbench and test generation, and coverage modeling and analysis.

  • DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence

    This video explores the key findings from the DFT's Expanding Role in Software-Driven Silicon white paper, which provides a snapshot of current industry practices rather than a longitudinal trend analysis. While many of the individual techniques and workflows highlighted in the study are well established, the results quantify their adoption within a common industry framework and reveal how they are increasingly converging.

  • DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence

    The 2026 Siemens EDA and Wilson Research Group Functional Verification Study includes new DFT questions that provide a current-state view rather than longitudinal trend data. The data suggests that DFT verification is increasingly connected with mainstream verification infrastructure, software-driven diagnostics, and silicon-lifecycle evidence.

  • DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence

    Examine the earlier verification of design-for-test logic, integration between DFT and functional verification, accelerated execution, and evolving ownership across engineering teams.

  • Functional Verification Study Survey Methodology Evolution

    Interpreting Long-term Results Across the 2024 Methodology Transition Understand the study’s recruitment transition, the appropriate use of historical comparisons, the treatment of nonresponse, and important considerations for interpreting the survey results.

  • Functional Verification Study Survey Methodology Evolution

    Beginning in 2024, the Siemens EDA and Wilson Research Group Functional Verification Study survey shifted from industry-list recruitment to a qualified sample-provider model, creating a break in direct comparability with studies conducted from 2007 through 2022.

  • 2026 Functional Verification Data Atlas

    Access the complete study data, including charts, survey-question wording, response bases, IC/ASIC and FPGA breakouts, nonresponse information, and data-quality notes.

  • 2026 Functional Verification Data Atlas

    A chart-level reference to selected 2026 Functional Verification Study findings. It is intended for lookup and citation support rather than long-form interpretation.

  • Why Agentic AI Could Redefine the Future of Design and Verification

    The semiconductor industry is no stranger to transformation. New architectures, new methodologies, and new levels of automation have repeatedly changed what engineering teams can accomplish. But the shift happening now feels different.

  • The Verification Problem Is Changing. Are We Asking the Right Questions

    There has never been a more exciting time to be working in semiconductors. Silicon is rapidly becoming the intelligence underneath almost everything around us from AI infrastructure and autonomous vehicles to factories, robots, connected cities, and systems operating in space. As silicon takes on more intelligence, more autonomy, and more responsibility, however, something else is happening: The verification problem is changing.

  • Questa One VeriThreader: Rethinking Verification Traceability for Modern Systems

    Download this white paper to learn why traditional approaches to verification traceability are no longer enough for modern development and how a lifecycle-wide approach can help improve visibility, strengthen traceability, and support better understanding of verification consequences across complex systems.

  • Questa One VeriThreader: Rethinking Verification Traceability for Modern Systems

    Verification is no longer a localized activity. It is a lifecycle-wide discipline that must connect evidence from concept to implementation. Traditional verification leaves verification activities disconnected across tools, organizations, and handoff points. This reduces visibility, complicates impact analysis, weakens auditable traceability, and limits reuse of verification knowledge.

  • Full Spectrum Equivalence Checking: From C++ to the FPGA Bitstream

    In this session, we will equip you with comprehensive solutions to tackle current and emerging verification trends and compliance requirements for FPGA designs including optimizing verification productivity and quality and streamlining your high-level language verification flow for FPGA designs.

  • Full Spectrum Equivalence Checking: From C++ to the FPGA Bitstream

    In this session, you will learn how to leverage Siemens and industry partner solutions to leverage your verified high-level language design and extend that verification through to the FPGA bitstream.

  • When thousands of RDC violations aren’t real: Making RDC verification smarter

    Imagine opening your latest reset domain crossing (RDC) report after a long overnight verification run. The analysis completes successfully. That’s great, but then you see the numbers: 50,000 RDC violations! Your first thought shouldn’t be: “The design is broken.” It should be: “How many of these are actually real?”