2026 Functional Verification Study: Executive Findings

The 2026 findings show that verification must address a wider and more interconnected set of risks. Processor-rich, accelerator-class, safety- and security-critical designs depend on interactions among hardware, software, architecture, requirements, power, clocking and reset, DFT, and system operation. At the same time, first-silicon success continues to decline, FPGA production escapes have risen, and verification continues to consume roughly half of project time.