IEEE 1801 UPF enables specification of the "power intent" of a design so that it's functionality can be verified along with design functionality early in the design process. A new methodology called Successive Refinement which articulates power intent into constraints, configuration, and implementation that is added incrementally, was conceived and refined within IEEE 1801-UPF and is now ready for broader adoption in the industry. This session will cover how to use the UPF Successive Refinement methodology in detail, how it can accelerate design and verification with a re-usable IP to System flow, and simplify the debugging of complex power management architectures. We will illustrate these advantages by applying the methodology to an ARM® IP-based system design.
