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Generating SystemVerilog Assertion (SVA) Properties with Property Assist
Webinar - Jul 16, 2025 by Mark Eslinger
In this webinar, you will learn how Questa Property Assist automatically generates SystemVerilog Assertions (SVA) that describe the behavior of hardware designs, using AI technology. In addition, Property Assist turns user prompts into optimized LLM prompts, retrieves LLM provided solutions, and presents the best generated SVA solutions for the user.
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Aerospace & Defense
Reference - Jul 01, 2025 by
Welcome to the Aerospace and Defense event archive, where you will find presentations and slide decks from live events that you may have missed. *Please note: you will need a valid login to download the session presentations.
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Accelerating Functional Coverage with Questa One CX
Webinar - Jun 18, 2025 by Chris Crile
This webinar introduces Questa One Sim CX, an innovative coverage-driven simulation solution that revolutionizes SystemVerilog UVM verification workflows.
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Accelerating Functional Coverage with Questa One CX
Resource (Slides (.PDF)) - Jun 18, 2025 by Chris Crile
In this webinar, you learn the benefits of using Questa One Sim CX in your constrained random verification environment.
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Industrial-Grade AI in EDA: From Promise to Practice — A Siemens Panel at DAC 2025
Resource (Verification Horizons Blog) - Jun 17, 2025 by Harry Foster
The AI revolution is reshaping everything from entertainment to enterprise software — but what does it take to bring artificial intelligence into the high-stakes, precision-driven world of electronic design automation (EDA)? That’s the central question behind a standout DAC 2025 panel hosted by Siemens EDA: “ Achieving Industrial-Grade AI in EDA: Challenges, Lessons, and Opportunities .”
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Generative AI: The Hype, The Hope, The Hard Truths — And the Debate at DAC
Resource (Verification Horizons Blog) - Jun 17, 2025 by Harry Foster
The semiconductor industry is no stranger to bold claims. But few topics today spark more debate — or more genuine uncertainty — than generative AI. At DAC 2025, we’re bringing this debate directly to the Pavilion stage with a dynamic panel.
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Accelerated Safety Assurance with Questa One Functional Safety Solution
Resource (Verification Horizons Blog) - Jun 16, 2025 by Jake Wiltgen
In an increasingly digital world, the safety and reliability of electronic systems are no longer optional, they are essential. Whether we’re talking about the circuitry in modern cars, life-saving medical devices, or complex industrial automation systems, the need for robust functional safety methodologies is greater than ever.
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Tackling Emerging DFT Verification Challenges with Questa One
Webinar - Jun 12, 2025 by Jake Wiltgen
In this webinar, you will learn how the Questa One DFT Verification solution, combined with Tessent Silicon Lifecycle Solutions delivers an evolution in user experience and performance to address these emerging verification challenges.
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Tackling Emerging DFT Verification Challenges with Questa One
Resource (Slides (.PDF)) - Jun 12, 2025 by Jake Wiltgen
In this webinar, you learn about the latest DFT-aware Questa One methodologies and engines tailored to Tessent workflows.
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Questa One Smart Verification: Unleashing the Potential of AI Within Functional Verification
Resource (Slides (.PDF)) - Jun 05, 2025 by Rebecca Echegaray
Leverage the power of AI and ML! Smart Verification revolutionizes functional verification by using faster engines that complement traditional heuristics with machine learning. Allow engineers to be more productive with advanced creation, analysis, and debugging capabilities, while reducing workloads through predictive technologies that streamline and accelerate the verification process.
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Functional Verification Workflow for Trusted and Assured Microelectronics & Questa One Overview
Resource (Slides (.PDF)) - Jun 05, 2025 by David Landoll
Learn about the effectiveness of enhancing security verification and improving the robustness of your hardware security verification through detailed explanations and runtime insights. Explore methods to protect against data corruption using formal security verification techniques.
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Ensure High Quality RTL with Early Continuous Integration
Resource (Slides (.PDF)) - Jun 05, 2025 by Walter Gude
Learn the value of Continuous Integration (CI) during development and how Questa Design Solutions are ideally suited for implementation in CI flows. Discover the benefits of integrating CI early to enhance RTL quality and streamline development processes.
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Enhancing Productivity in Simulation-Based Functional Verification
Resource (Slides (.PDF)) - Jun 05, 2025 by Sunil Sahoo
Improving productivity has become crucial for efficiently utilizing expensive human and grid resources in the functional verification process. Achieving the "done" state requires more than simulator performance—it demands a strategic focus on optimizing workflows, prioritizing tasks, and leveraging metrics to guide efforts. A productivity-driven approach ensures resources are deployed effectively, accelerating verification closure.
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Introduction and Agenda
Resource (Slides (.PDF)) - Jun 05, 2025 by Todd Holbrook
Verification Academy Live Introduction and Agenda.
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VA Live - Huntsville, AL: Welcome
Resource (Slides (.PDF)) - Jun 05, 2025 by Todd Holbrook
Welcome to Verification Academy Live.
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Enhancing Automotive Safety Verification Using Questa One Sim FX
Resource (Slides (.PDF)) - Jun 04, 2025 by Ann Keffer
In this webinar, you will learn how Questa One Sim FX optimizes fault campaigns through advanced features including fault list optimization and test ranking capabilities.
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Enhancing Automotive Safety Verification Using Questa One Sim FX
Webinar - Jun 04, 2025 by Ann Keffer
In this webinar, you will learn how Questa One Sim FX optimizes fault campaigns through advanced features including fault list optimization and test ranking capabilities. The webinar will demonstrate the tool's seamless integration with existing testbench environments (UVM and native), eliminating the need for extensive modifications and reducing setup overhead.
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From Rule-Based Beginnings to AI-Driven Design: Tracing the Evolution of AI in EDA
Resource (Verification Horizons Blog) - Jun 03, 2025 by Harry Foster
As we gear up for the 62nd Design Automation Conference (DAC) in San Francisco, one of the most anticipated events is the Accellera-sponsored luncheon panel : Can AI Cut Costs in Electronic Design & Verification While Accelerating Time-To-Market? This panel brings together voices from across the industry to examine how artificial intelligence is reshaping the design and verification landscape.
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Questa One Smart Verification: Unleashing the Potential of AI Within Functional Verification
Resource (Slides (.PDF)) - Jun 03, 2025 by Rebecca Echegaray
Leverage the power of AI and ML! Smart Verification revolutionizes functional verification by using faster engines that complement traditional heuristics with machine learning. Allow engineers to be more productive with advanced creation, analysis, and debugging capabilities, while reducing workloads through predictive technologies that streamline and accelerate the verification process.
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Functional Verification Workflow for Trusted and Assured Microelectronics & Questa One Overview
Resource (Slides (.PDF)) - Jun 03, 2025 by David Landoll
Learn about the effectiveness of enhancing security verification and improving the robustness of your hardware security verification through detailed explanations and runtime insights. Explore methods to protect against data corruption using formal security verification techniques.
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Questa One Avery VIP: Accelerated Confidence in Complex Protocol Verification
Resource (Paper (.PDF)) - Jun 03, 2025 by Gordon Allan
This paper describes specific verification challenges, showcases innovative solutions for real-world stimulus and hardware/software co-simulation, and highlights the value delivered to early adopters.
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Questa One Avery VIP: Accelerated Confidence in Complex Protocol Verification
Paper - Jun 03, 2025 by Gordon Allan
Questa One Avery VIP’s cutting-edge technologies promise to enhance productivity and ease of use in the rapidly expanding landscape of complex interfaces and memory protocols, spanning SoC designs, 3D IC chiplets, and FW/SW integration. This paper describes specific verification challenges, showcases innovative solutions for real-world stimulus and hardware/software co-simulation, and highlights the value delivered to early adopters.
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Ensure High Quality RTL with Early Continuous Integration
Resource (Slides (.PDF)) - Jun 03, 2025 by Walter Gude
Learn the value of Continuous Integration (CI) during development and how Questa Design Solutions are ideally suited for implementation in CI flows. Discover the benefits of integrating CI early to enhance RTL quality and streamline development processes.
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Enhancing Productivity in Simulation-Based Functional Verification
Resource (Slides (.PDF)) - Jun 03, 2025 by Sunil Sahoo
Improving productivity has become crucial for efficiently utilizing expensive human and grid resources in the functional verification process. Achieving the "done" state requires more than simulator performance—it demands a strategic focus on optimizing workflows, prioritizing tasks, and leveraging metrics to guide efforts. A productivity-driven approach ensures resources are deployed effectively, accelerating verification closure.
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Introduction and Agenda
Resource (Slides (.PDF)) - Jun 03, 2025 by Todd Holbrook
Verification Academy Live Introduction and Agenda.