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Testbench Acceleration Depicted

Session - Feb 25, 2011 by Dr. Hans van der Schoot

This session provides a description of the considerations and recommended architecture utilized for acceleration of SystemVerilog testbenches with co-emulation. This includes a definition of how SystemVerilog testbench code (HVL) and design code (HDL) are partitioned.
Modeling for Acceleration

Session - Feb 25, 2011 by Dr. Hans van der Schoot

This session introduces the basic requirements of a standards-based co-emulation solution. It provides a technical description of the transaction-based communication mechanism between simulator and emulator.
Testbench Acceleration Flow

Session - Feb 25, 2011 by Dr. Hans van der Schoot

This session provides the recommended flow for rapid bring up of an accelerated testbench environment that can be used for both pure simulation and for hardware-assisted acceleration of SystemVerilog testbenches.
Why Plan?

Session - Feb 25, 2011 by Peet James

This session moves beyond general fear-based justifications for increased verification efforts to logical reasons for why verification typically is more overall effort than the actual design. This session uses gathered metrics to guide verification improvements, such as suggesting a verification progression to aide in better scheduling and implementation. This discussion spells out the argument for strategically planning verification, and for planning it early.
Why It's Hard

Session - Feb 25, 2011 by Peet James

This session covers seven historical reasons as to why the overall verification effort and verification planning in general is difficult.
Plan of Attack

Session - Feb 25, 2011 by Peet James

This third session goes towards dividing up all that work into some logical categories and coming up with a plan of attack for overall verification success. A threefold attack is suggested and described, followed by 3 example approaches.
SystemVerilog Concurrent Assertions

Seminar - Feb 25, 2011 by Cliff Cummings

In this session, you will learn about concurrent assertions.
SystemVerilog Testbench Acceleration

Track - Feb 25, 2011 by Dr. Hans van der Schoot

This track advocates that functional verification through modern testbenches paired with co-emulation enables further verification productivity improvements in terms of raw performance. This track is primarily aimed at existing SystemVerilog H/W engineers or managers who recognize they have a functional verification throughput problem but have little or no experience with using emulation as a means for accelerating SystemVerilog testbench environments.
Introduction to the Verification Academy

Session - Feb 25, 2011 by Harry Foster

This session provides a common framework for all advanced functional verification tracks contained within the Verification Academy.
Verification Planning and Management

Track - Feb 22, 2011 by Peet James

In this track, you will learn how to architect an overall verification approach, and then to document that approach in a family of useful, easily extracted, maintainable verification documents that will strategically guide the overall verification effort so that the most amount of verification is accomplished in the allotted time. We will also define terms, logically divide up the verification effort, and lay the foundation for actual verification planning and management on a real project.
Verification Horizons - Volume 7, Issue 1

Resource (Verification Horizons Archive) - Feb 01, 2011 by Tom Fitzpatrick

"I was thinking about this idea of transformation — taking something familiar and adding a new twist that makes it better...”
Verification Horizons - Volume 6, Issue 3

Resource (Verification Horizons Archive) - Nov 01, 2010 by Tom Fitzpatrick

“It all comes down to building on the familiar while pushing the boundaries a bit and stepping a little outside your comfort zone.”
Verification Horizons - Volume 6, Issue 2

Resource (Verification Horizons Archive) - Jun 01, 2010 by Tom Fitzpatrick

“How does a team apply new approaches to a problem, especially when the team is geographically dispersed?”
Assertion-Based Verification

Track - Feb 10, 2010 by Harry Foster

This track introduces a set of steps for advancing an organization’s assertion-based-verification (ABV) skills, infrastructure, and metrics.
Introduction to Assertion-Based Verification

Session - Feb 10, 2010 by Harry Foster

This session includes a survey of today’s productivity challenges and the role ABV plays in improving productivity.
Maturing ABV Process Capabilities

Session - Feb 10, 2010 by Harry Foster

This session will introduce a framework for advancing an organization’s verification process capabilities, with an emphasis on ABV processes.
Introduction to SystemVerilog Assertions

Session - Feb 10, 2010 by Harry Foster

This session is targeted at the novice who has no exposure to assertion languages, or as an assertion refresher for the experienced engineer.
Introduction to Open Verification Library (OVL)

Session - Feb 10, 2010 by Harry Foster

This session is targeted at the novice who has no exposure to assertion libraries, or as an assertion refresher session for the experienced engineer.
Assertion Patterns

Session - Feb 10, 2010 by Harry Foster

This session will provide a discussion on how to mature your organization's assertion skill through the use of assertion patterns.
Cookbook Examples

Session - Feb 10, 2010 by Harry Foster

This session will discuss how to mature your organization’s assertion skill through the use of complete cookbook examples.
ABV and Formal Property Checking

Session - Feb 10, 2010 by Harry Foster

This session will discuss how to successfully plan and integrate formal verification into your ABV flow.
Questa Simulation: Assertions

Demo - Feb 10, 2010 by Chuck Seeley

In this demo, you will learn how assertions can be used in simulation.
Questa Formal Verification

Demo - Feb 10, 2010 by Mark Eslinger

In this demo, you will learn how assertions can be used in formal verification.
Verification Horizons - Volume 6, Issue 1

Resource (Verification Horizons Archive) - Feb 01, 2010 by Tom Fitzpatrick

“One of my favorite things about this week (DVCon) is the opportunity to meet new friends (and catch up with old friends, too), and I’d love to hear in person what you think about the conference, Verification Horizons, or the industry in general.”
Industry Perspective & Opportunities in ABV

Webinar - Jan 15, 2010 by Harry Foster

In this session, you will learn about Industry Perspective and Opportunities in ABV.