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Five Signals from the 2026 Functional Verification Study
Resource (Paper (.PDF)) - Sep 08, 2026 Harry Foster
The forthcoming 2026 Siemens EDA and Wilson Research Group Functional Verification Study indicates that the IC verification problem is changing in nature, not simply growing in complexity.
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Five Signals from the 2026 Functional Verification Study
Paper - Sep 08, 2026 Harry Foster
Explore five connected trends shaping functional verification, including alternative explanations, interpretation guardrails, respondent-vantage considerations, and the industry’s shift toward building system confidence in executable systems.
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AI in Functional Verification: What the 2026 Industry Data Reveals
Paper - Sep 08, 2026 Harry Foster
Learn where AI is being applied within functional verification, how broadly it is integrated into engineering workflows, and where adoption remains limited.
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AI in Functional Verification: What the 2026 Industry Data Reveals
Session - Sep 08, 2026 Harry Foster
This video explores the key findings from the AI in Functional Verification: What the 2026 Industry Data Reveals white paper. For the first time, the 2026 Siemens EDA and Wilson Research Group Functional Verification Study provides industry data on AI/ML adoption in functional verification. Among 604 participants, 82.8% report use beyond evaluation or pilot projects, yet only 9.0% describe AI as broadly integrated across the verification flow.
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AI in Functional Verification: What the 2026 Industry Data Reveals
Resource (Paper (.PDF)) - Sep 08, 2026 Harry Foster
For the first time, the 2026 Siemens EDA and Wilson Research Group Functional Verification Study provides industry data on AI/ML adoption in functional verification. This paper reports on these findings, examining applications, benefits, and barriers to adoption. Leading applications of AI are debug and root-cause analysis, testbench and test generation, and coverage modeling and analysis.
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DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence
Session - Sep 08, 2026 Harry Foster
This video explores the key findings from the DFT's Expanding Role in Software-Driven Silicon white paper, which provides a snapshot of current industry practices rather than a longitudinal trend analysis. While many of the individual techniques and workflows highlighted in the study are well established, the results quantify their adoption within a common industry framework and reveal how they are increasingly converging.
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DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence
Resource (Paper (.PDF)) - Sep 08, 2026 Harry Foster
The 2026 Siemens EDA and Wilson Research Group Functional Verification Study includes new DFT questions that provide a current-state view rather than longitudinal trend data. The data suggests that DFT verification is increasingly connected with mainstream verification infrastructure, software-driven diagnostics, and silicon-lifecycle evidence.
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DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence
Paper - Sep 08, 2026 Harry Foster
Examine the earlier verification of design-for-test logic, integration between DFT and functional verification, accelerated execution, and evolving ownership across engineering teams.
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Functional Verification Study Survey Methodology Evolution
Reference - Sep 08, 2026 Harry Foster
Interpreting Long-term Results Across the 2024 Methodology Transition Understand the study’s recruitment transition, the appropriate use of historical comparisons, the treatment of nonresponse, and important considerations for interpreting the survey results.
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Functional Verification Study Survey Methodology Evolution
Resource (Reference (.PDF)) - Sep 08, 2026 Harry Foster
Beginning in 2024, the Siemens EDA and Wilson Research Group Functional Verification Study survey shifted from industry-list recruitment to a qualified sample-provider model, creating a break in direct comparability with studies conducted from 2007 through 2022.
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2026 Functional Verification Data Atlas
Reference - Sep 08, 2026 Harry Foster
Access the complete study data, including charts, survey-question wording, response bases, IC/ASIC and FPGA breakouts, nonresponse information, and data-quality notes.
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2026 Functional Verification Data Atlas
Resource (Reference (.PDF)) - Sep 08, 2026 Harry Foster
A chart-level reference to selected 2026 Functional Verification Study findings. It is intended for lookup and citation support rather than long-form interpretation.
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Why Agentic AI Could Redefine the Future of Design and Verification
Resource (Verification Horizons Blog) - Aug 31, 2026 Harry Foster
The semiconductor industry is no stranger to transformation. New architectures, new methodologies, and new levels of automation have repeatedly changed what engineering teams can accomplish. But the shift happening now feels different.
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The Verification Problem is Changing. Are We Asking the Right Questions
Resource (Verification Horizons Blog) - Aug 24, 2026 Harry Foster
There has never been a more exciting time to be working in semiconductors. Silicon is rapidly becoming the intelligence underneath almost everything around us from AI infrastructure and autonomous vehicles to factories, robots, connected cities, and systems operating in space. As silicon takes on more intelligence, more autonomy, and more responsibility, however, something else is happening: The verification problem is changing.
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Questa One VeriThreader: Rethinking Verification Traceability for Modern Systems
Resource (Paper (.PDF)) - Aug 14, 2026 Jake Wiltgen
Download this white paper to learn why traditional approaches to verification traceability are no longer enough for modern development and how a lifecycle-wide approach can help improve visibility, strengthen traceability, and support better understanding of verification consequences across complex systems.
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Questa One VeriThreader: Rethinking Verification Traceability for Modern Systems
Paper - Aug 14, 2026 Jake Wiltgen
Verification is no longer a localized activity. It is a lifecycle-wide discipline that must connect evidence from concept to implementation. Traditional verification leaves verification activities disconnected across tools, organizations, and handoff points. This reduces visibility, complicates impact analysis, weakens auditable traceability, and limits reuse of verification knowledge.
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PCIe 8.0 over UCIe 3.0: Bringing a Proven Protocol into the Chiplet Era
Resource (Paper (.PDF)) - Aug 12, 2026 Prashant Dixit
In this paper, you will learn that PCIe 8.0 over UCIe 3.0 paves a practical roadmap to carry the industry’s most established I/O protocol into the chiplet era. For designers building AI, HPC, storage, and heterogeneous compute platforms, this combination enables silicon disaggregation without abandoning standards-based interoperability.
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PCIe 8.0 over UCIe 3.0: Bringing a Proven Protocol into the Chiplet Era
Paper - Aug 12, 2026 Prashant Dixit
As architectures move from monolithic SoCs to chiplet-based designs, the value of PCIe remains high, yet conventional PCIe implementations board-oriented assumptions are no longer ideal for short-reach, in-package communication. UCIe standardizes die-to-die communication within a package and allows PCIe traffic to traverse chiplet boundaries with seamless interoperability over standardized interconnects.
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Agentic AI and the Rise of the Design and Verification Scientist
Conference - Jul 26, 2026 Chandu Challapalli
This session explores how agentic AI can address both challenges. Autonomous systems that reason, plan, and adapt across the chip development lifecycle don't just accelerate workflows, they dissolve boundaries between creation and validation entirely.
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Full Spectrum Equivalence Checking: From C++ to the FPGA Bitstream
Webinar - Jul 22, 2026 Kevin Urish
In this session, we will equip you with comprehensive solutions to tackle current and emerging verification trends and compliance requirements for FPGA designs including optimizing verification productivity and quality and streamlining your high-level language verification flow for FPGA designs.
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Full Spectrum Equivalence Checking: From C++ to the FPGA Bitstream
Resource (Slides (.PDF)) - Jul 22, 2026 Kevin Urish
In this session, you will learn how to leverage Siemens and industry partner solutions to leverage your verified high-level language design and extend that verification through to the FPGA bitstream.
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When Thousands of RDC Violations aren’t Real: Making RDC Verification Smarter
Resource (Verification Horizons Blog) - Jul 17, 2026 Reetika
Imagine opening your latest reset domain crossing (RDC) report after a long overnight verification run. The analysis completes successfully. That’s great, but then you see the numbers: 50,000 RDC violations! Your first thought shouldn’t be: “The design is broken.” It should be: “How many of these are actually real?”
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Discover What’s Next: Siemens EDA at DAC 2026
Resource (Verification Horizons Blog) - Jul 14, 2026 Harry Foster
The semiconductor industry is entering a new era. AI is changing not only the chips we design, but how we design them. 3D IC and heterogeneous integration are redefining what constitutes a “system.” And as products become increasingly software-defined, the boundaries between silicon, hardware and software continue to disappear. That’s why I’m particularly excited about this year’s Design Automation Conference (DAC) in Long Beach.
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From False Alarms to Real Insights: Refining RDC to Catch Missed STA Scenarios
Paper - Jul 01, 2026 Reetika
This paper introduces a refined verification methodology that leverages intelligent filtering and classification to separate true hazards from safe crossings. By cutting through the noise, the approach not only reduces verification effort but also shortens closure time, enabling faster, more confident sign-off. Ultimately, this work demonstrates how smarter RDC verification can transform a traditionally tedious process into an efficient and reliable path to design quality.
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Verification Academy 2026 Webinar Round-Up
Resource (Verification Horizons Blog) - Jun 15, 2026 Dennis Brophy
It’s hard to believe, but we’re already almost halfway through 2026! Time flies when you’re innovating, and here at Siemens, we’ve been busy bringing you a fantastic lineup of webinars to keep you at the forefront of technology. We’ve covered a lot of ground in the first half of the year, diving deep into everything from advanced verification techniques to the exciting world of AI/ML design.