Jalaj Gupta
Jalaj Gupta is Verification IP Product Engineer at Siemens EDA. Jalaj handles providing support for PCIe and UCIe Avery Verification IPs. He has 10 years of experience working in simulation and emulation domain, from developing Verification IPs to transactor library development for Veloce to product engineering for leading edge Avery Verification IPs. He has worked on different protocols like USB, Ethernet, AMBA, I2C and PCIe. He has post-graduation diploma in VLSI from CDAC, India and he is based in Austin, Texas.
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