Browse all content in Verification Academy: Articles, Cookbooks, Resources, Sessions, and Tracks

May 2026

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  Automated Requirement Driven, SystemVerilog-based Verification Workflow for Mixed-Signal ASICs

  Functional Safety May 12, 2026 Vincent Camus Conference

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  Verifying a 3DIC IP with Avery UCIe and the Questa One Sim Workflow

  Verification IP May 12, 2026 Niels Burkhardt Conference

February 2026

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  Securing Next-Generation Interconnects: PCIe® Gen7 Security Verification

  Verification IP Feb 18, 2026 Jalaj Gupta Webinar

• Securing Next-Generation Interconnects: PCIe® Gen7 Security Verification

  Verification IP Feb 18, 2026 Jalaj Gupta pdf

• Verifying Chiplet Interconnects at Scale: UCIe® 3.0

  Verification IP Feb 04, 2026 Luis Rodriguez pdf

• Verifying Future Accelerator Interconnects: UALink™ Verification IP and Why UALink Matters

  Verification IP Feb 04, 2026 Jalaj Gupta pdf

September 2025

• From Novice to Expert: Your Tutorial Roadmap at DVCon Europe 2025

  Machine Learning Sep 17, 2025 Joe Hupcey link

June 2025

• Accelerated Safety Assurance with Questa One Functional Safety Solution

  Functional Safety Jun 16, 2025 Jake Wiltgen link

• Enhancing Automotive Safety Verification Using Questa One Sim FX

  Functional Safety Jun 04, 2025 Ann Keffer pdf

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  Enhancing Automotive Safety Verification Using Questa One Sim FX

  Functional Safety Jun 04, 2025 Ann Keffer Webinar

May 2025

• Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

  Verification IQ May 28, 2025 Nishtha pdf

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  Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

  Verification IQ May 28, 2025 Nishtha Webinar

April 2025

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  Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity

  Verification IP Apr 30, 2025 Kevin Ham Webinar

• Breaking Barriers: Ethernet 1.6T, UALink, and UEC Verification for Next-Gen Connectivity

  Verification IP Apr 30, 2025 Kevin Ham pdf

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  Securing your FPGA Design from RTL through to the Bitstream

  FPGA Verification Apr 23, 2025 Keerthi Devraj Webinar

• Securing your FPGA Design from RTL through to the Bitstream

  FPGA Verification Apr 23, 2025 Keerthi Devraj pdf

March 2025

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  PCIe Gen7 Verification with Siemens Avery Verification IP

  Verification IP Mar 26, 2025 Zhihong Zeng Webinar

• PCIe Gen7 Verification with Siemens Avery Verification IP

  Verification IP Mar 26, 2025 Zhihong Zeng pdf

• GOMACTech 2025 Preview: FPGA Safety and Security Policy Compliance via HDL-to-Bitstream Equivalence Checking

  FPGA Verification Mar 04, 2025 Joe Hupcey link

February 2025

• Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream

  FPGA Verification Feb 19, 2025 Kevin Urish pdf

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  Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream

  FPGA Verification Feb 19, 2025 Kevin Urish Webinar

January 2025

• Next-Gen Memory Unlocked: HBM4 and LPDDR6 Verification for High-Performance Computing

  Verification IP Jan 30, 2025 Kamlesh Mulchandani pdf

• Accelerating Innovation: PCIe Gen7 Verification for High-Speed Design

  Verification IP Jan 30, 2025 Zhihong Zeng pdf

November 2024

• Boost Your Verification Productivity with Questa Verification IQ

  Verification IQ Nov 21, 2024 Mark Carey pdf

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  Boost Your Verification Productivity with Questa Verification IQ

  Verification IQ Nov 21, 2024 Mark Carey Webinar