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March 2016 - Volume 12 Issue 1 (14)

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September 2021 - Volume 17 Issue 2 (12)

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June 2012 - Volume 8 Issue 2 (9)

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February 2013 - Volume 9 Issue 1 (8)

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June 2016 - Volume 12 Issue 2 (8)

March 2021 - Volume 17 Issue 1 (8)

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July 2020 - Volume 16 Issue 2 (7)

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March 2015 - Volume 11 Issue 1 (7)

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November 2014 - Volume 10 Issue 3 (7)

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Order Property Pattern (7)

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VA Live 2023 - Huntsville (7)

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December 2017 - Volume 13 Issue 3 (6)

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June 2019 - Volume 15 Issue 2 (6)

MARLUG 2023 (6)

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March 2014 - Volume 10 Issue 1 (6)

March 2017 - Volume 13 Issue 1 (6)

March 2020 - Volume 16 Issue 1 (6)

March 2024 - Volume 20 Issue 1 (6)

Metric Validation (6)

November 2016 - Volume 12 Issue 3 (6)

November 2020 - Volume 16 Issue 3 (6)

October 2012 - Volume 8 Issue 3 (6)

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Open Source (6)

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VA Live 2024 - El Segundo (6)

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December 2019 - Volume 15 Issue 3 (5)

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February 2019 - Volume 15 Issue 1 (5)

Flip-Flop (5)

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March 2018 - Volume 14 Issue 1 (5)

Objections (5)

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UCIe 3.0 (5)

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VA Live 2019 - Westford (5)

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November 2018 - Volume 14 Issue 3 (4)

PCIe Gen 6 (4)

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VA Live 2023 - Austin (4)

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July 2023 - Volume 19 Issue 2 (3)

Jump Statements (3)

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Qrun (3)

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Repository (3)

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Type Casting (3)

UVM 1.1d (3)

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UVM Rapid Adoption (3)

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Retargeting Flow (2)

Runtime (2)

SATA (2)

SCE-MI (2)

SCSI (2)

SDC (2)

SDC Verification (2)

Sampling (2)

Security Analysis (2)

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July 2015

Evolution of Debug
Debug Jul 28, 2015 Gordon Allan pdf
Unleashing the Full Power of UPF Power States
Low Power Jul 17, 2015 pdf
EZ Verification with Questa Verification IP
Verification IP Jul 06, 2015 Jason Polychronopoulos pdf
New School Connectivity Checking
Formal Verification Jul 01, 2015 Mark Eslinger Webinar

June 2015

Power Aware CDC Verification
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Track
Power Aware CDC Introduction and Overview
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Understanding Low Power Impact on CDC Logic
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Describing Low Power Logic with UPF
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Integrating Power Aware CDC into a Design Flow
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Questa CDC Power Aware
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Verification Methodology Cookbooks
Standards Jun 29, 2015 Verification Methodology Team Cookbook
DAC 2015 Academy PDF Presentation: New Coverage Closure Techniques - Mentor Graphics
Standards Jun 22, 2015 pdf
Debug Data API (DDA)
Debug Jun 19, 2015 Ellie Burns pdf
Boosting Test-Creation Productivity with Portable Stimulus
Portable Stimulus Jun 19, 2015 Tom Fitzpatrick pdf
DAC 2015 Academy PDF Presentation: Successive Refinement: A Methodology for Incremental Specification of Power Intent using UPF - Mentor Graphics
Standards Jun 19, 2015 pdf
Off and Running with UVM
Standards Jun 19, 2015 pdf
Industry Standards and FPGA Verification Trends
FPGA Verification Jun 19, 2015 Harry Foster pdf
An Agile Evolution in SoC Verification
Planning, Measurement and Analysis Jun 19, 2015 Neil Johnson pdf
DAC 2015 Academy PDF Presentation: UVM Message Display Commands - Sunburst Design
Standards Jun 19, 2015 pdf
Evolution Of Debug
Debug Jun 19, 2015 pdf
Next Generation Debug Experience with Visualizer
Debug Jun 19, 2015 Vahid Naraghi pdf
Software Debug on Veloce
Acceleration Jun 19, 2015 pdf
Trends in Debugging: Broad & Flexible Silicon Debug Visibility
Debug Jun 19, 2015 Stephen Bailey pdf
Trends in Debugging: From Challenges to Solutions
Debug Jun 19, 2015 Harry Foster pdf
Automating the Capture of Assertion Verification Results for DO-254
Functional Safety Jun 06, 2015 Vipul Patel - Einfochips Article

BUGGED OUT Podcast

Every chip has bugs — the real question is how fast you can find and fix them.

AI/ML Webinar

Wednesday, Jan 28th-8:00 AM PST

Supercharge your CDC & RDC Analysis with The Power of AI/ML

User2User Speaker Program

Become a Speaker at User2User 2026 | Santa Clara, CA | Munich, Germany

VA Live Silicon Valley

Wednesday, Feb 04th-9:30 AM PST

Avery Verification IP for AI/ML/HPC | Santa Clara, CA

Coverage Analysis Webinar

Thursday, Feb 05th-8:00 AM PST

Close Coverage Faster with Questa One Sim's Unreachability Analysis

Low Power Webinar

Wednesday, Feb 11th-12:00 PM PST

Don’t Miss CDC Bugs in Low Power Designs!: Formal Meets Power Aware CDC

PCIe® Gen7 Webinar

Wednesday, Feb 18th-10:00 AM PST

Securing Next-Generation Interconnects: PCIe® Gen7 Security Verification

VA Live Austin

Thursday, Feb 19th-7:30 AM PST

Discussing the AI/ML paradigm shift across the industry.

VA Live El Segundo

Tuesday, Feb 24th-9:30 AM PST

Discussing the latest advancements in RTL simulation.

FPU Verification Webinar

Wednesday, Feb 25th-8:00 AM PST

AI Assisted FPU Verification Using Questa One SFV

New White Papers!

Formal, Avery VIP, Coverage, UPF, Functional Safety and More!

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