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INTRODUCTION
The Questa® Power Aware (PA) dynamic simulator (PA-SIM) provides a wide range of automated assertions in the form of dynamic sequence checkers that cover every possible PA dynamic verification scenario. However, design specific PA verification complexities may arise from adoption of one or a multiple of power dissipation reduction techniques, from a multitude of design features — like UPF strategies — as well as from target design implementation objectives. Hence, apart from tool automated checks and PA annotated testbenches, additional and customized PA assertions, checkers, and their monitors are sometimes required to be incorporated in a design.
But a design may already contain plentiful assertions from functional
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