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Empowering Issue Hunting Mode Verification on RISC-V Architectures
Resource (Recording) - Oct 17, 2024 by Teo Bernier - Thales Group
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Empowering Issue Hunting Mode Verification on RISC-V Architectures
Resource (Slides (.PDF)) - Oct 17, 2024 by Teo Bernier - Thales Group
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Taming Formal with Intelligent Automation?
Resource (Recording) - Oct 17, 2024 by Tobias Ludwig - Lubis EDA
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Taming Formal with Intelligent Automation?
Resource (Slides (.PDF)) - Oct 17, 2024 by Tobias Ludwig - Lubis EDA
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Achieving Efficient Verification Combining Simulation and Formal
Resource (Slides (.PDF)) - Oct 17, 2024 by Ilia Barkov - Semidynamics
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Achieving Efficient Verification Combining Simulation and Formal
Resource (Recording) - Oct 17, 2024 by Ilia Barkov - Semidynamics
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osmosis 2024
Conference - Oct 17, 2024 by Nicolae Tusinschi
The annual osmosis event is a dynamic platform for exchanging successes achieved through applying formal techniques to overcome verification challenges. It offers a unique opportunity to connect and engage with our accomplished research and development (R&D) experts and participants. The conversations that follow may help you and others improve formal-based verification solutions.
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New AI Horizons in Static & Formal Verification
Resource (Recording) - Apr 24, 2024 by Dan Yu
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New AI Horizons in Static & Formal Verification
Resource (Slides (.PDF)) - Apr 24, 2024 by Dan Yu
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Optimizing FPGA Equivalence Checking for A&D Designs
Resource (Slides (.PDF)) - Apr 24, 2024 by Kevin Urish
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Driving Efficient Execution with Continuous Integration
Resource (Slides (.PDF)) - Apr 24, 2024 by Kevin Campbell
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Enverite PV-Bit: Bitstream Verification for FPGA Design Assurance
Resource (Slides (.PDF)) - Apr 24, 2024 by Dr. Jonathan Graf
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osmosis Aerospace and Defense 2024
Conference - Apr 24, 2024 by John Hallman
osmosis Aerospace and Defense (A&D) is about sharing the success in using formal techniques to address the demanding verification requirements and challenges of Trust and Assurance verification, Safety Critical Designs, and DO-254 compliant and other high-consequence systems.
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Hierarchical verification flow for FPGA design projects
Resource (Slides (.PDF)) - Nov 16, 2023 by Mamma Benmoussa Garsault - Arcys
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Limits of verification: learnings from catastrophic system failures
Resource (Slides (.PDF)) - Nov 16, 2023 by Philippe Luc - Codasip
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Reducing formal verification runtime in SystemC utilizing modular interface
Resource (Slides (.PDF)) - Nov 16, 2023 by Hideki Kazama - Sony
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Dusica Glisic - Veriest
Resource (Interview) - Nov 16, 2023 by Dusica Glisic - Veriest
Interview with Dusica Glisic of Veriest about the value of attending Osmosis.
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Mihajlo Katona - Veriest
Resource (Interview) - Nov 16, 2023 by Mihajlo Katona - Veriest
Interview with Mihajlo Katona of Veriest about his presentation on combining sim and formal, formal for security, FPGA, and HLS verification, HLS and formal - and advice on starting out with formal.
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How to sign-off cryptographic hash implementations with generated formal assertions
Resource (Slides (.PDF)) - Nov 16, 2023 by Tobias Ludwig - Lubis EDA
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Reducing Formal Verification Runtime in SystemC Utilizing Modular Interface
Resource (Recording) - Nov 16, 2023 by Hideki Kazama - Sony
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Debugging enhancements for formal property checking
Resource (Slides (.PDF)) - Nov 16, 2023 by Holger Busch - Infineon
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Satinder Paul Singh - CGNT
Resource (Interview) - Nov 16, 2023 by Satinder Paul Singh - CGNT
Interview with Dusica Glisic of Veriest about the value of attending Osmosis.
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Martin Gut - Bosch Sensortec
Resource (Interview) - Nov 16, 2023 by Martin Gut - Bosch Sensortec
Interview with Martin Gut of Bosch Sensortec about the value of learning from Osmosis different formal verification approaches.
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How formal methods could banish the ghosts that haunt our computing systems
Resource (Recording) - Nov 16, 2023 by Prof. Wolfgang Kunz - RPTU
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Safeguarding datapath integrity and compliance with formal security verification
Resource (Recording) - Nov 16, 2023 by Keerthi Devraj