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March 2016 - Volume 12 Issue 1 (14)

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September 2021 - Volume 17 Issue 2 (12)

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July 2022 - Volume 18 Issue 2 (10)

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June 2012 - Volume 8 Issue 2 (9)

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Design and Verification IP Forum (8)

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February 2013 - Volume 9 Issue 1 (8)

Floating-Point Units (8)

HDL Domain (8)

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June 2016 - Volume 12 Issue 2 (8)

March 2021 - Volume 17 Issue 1 (8)

Messaging (8)

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XML (8)

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ISA (7)

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Israel Static & Formal Tech Day (7)

July 2020 - Volume 16 Issue 2 (7)

Layering (7)

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March 2015 - Volume 11 Issue 1 (7)

March 2022 - Volume 18 Issue 1 (7)

March 2023 - Volume 19 Issue 1 (7)

Migration (7)

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Monitor (7)

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November 2014 - Volume 10 Issue 3 (7)

November 2015 - Volume 11 Issue 3 (7)

Objections (7)

Order Property Pattern (7)

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Supply Network (7)

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VA Live 2023 - Huntsville (7)

Windows (7)

AEH (6)

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Appendix (6)

Artificial Neural Network (6)

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Bugged Out Podcast (6)

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Callbacks (6)

Class Types (6)

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Coverage Intent (6)

Creating and Using a Test Plan (6)

DAC 2018 (6)

December 2017 - Volume 13 Issue 3 (6)

December 2022 - Volume 18 Issue 3 (6)

Defect Coverage (6)

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Development Environment (6)

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Dynamic Power (6)

Electronic Hardware (6)

Fabric (6)

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Front and Back Door (6)

HDL (6)

HDM (6)

Hardware Designs (6)

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Implicit/Explicit (6)

June 2019 - Volume 15 Issue 2 (6)

MARLUG 2023 (6)

MIPI (6)

March 2014 - Volume 10 Issue 1 (6)

March 2017 - Volume 13 Issue 1 (6)

March 2020 - Volume 16 Issue 1 (6)

March 2024 - Volume 20 Issue 1 (6)

Metric Validation (6)

November 2016 - Volume 12 Issue 3 (6)

November 2020 - Volume 16 Issue 3 (6)

October 2012 - Volume 8 Issue 3 (6)

October 2013 - Volume 9 Issue 3 (6)

Open Source (6)

PCIe Gen 7 (6)

Power Efficiency (6)

Pre-Silicon (6)

Random Faults (6)

Respins (6)

Semiconductor (6)

Slave (6)

Static Analyses (6)

Stimulus Free Verification (6)

Syntax (6)

Tessent Test Solutions (6)

Test Plan (6)

Transaction-Level (6)

UCIe 3.0 (6)

UVM Forum (6)

UVVM (6)

VA Live 2024 - El Segundo (6)

VA Live 2024 - San Diego (6)

VA Live 2025 - El Segundo (6)

VA Live 2025 - Hudson (6)

VA Live 2025 - Huntsville (6)

VA Live 2026 - Hudson (6)

VHDL Testbench (6)

Verbosity (6)

Verification Cycles (6)

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Verification Workflow (6)

Visualization (6)

X-Effects (6)

YAML (6)

osmosis 2024 A&D (6)

Advance Your Verification Methodology (5)

Agile Development (5)

Analysis Pattern (5)

BIST (5)

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C++ (5)

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Constraint Solver (5)

Control Logic (5)

Converters (5)

DAC 2024 (5)

DSP (5)

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Debug Challenges (5)

December 2019 - Volume 15 Issue 3 (5)

Design Cycle (5)

Design Hierarchy (5)

Domain Specific Architectures (5)

Driver Tracing (5)

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Error (5)

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FMEDA (5)

February 2019 - Volume 15 Issue 1 (5)

Formal Methods (5)

Formal Testbench (5)

HBM (5)

HBM4 (5)

Hardware Verification (5)

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Hierarchical Data Model (5)

High-Speed (5)

IDE (5)

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JEDEC (5)

LRM (5)

Low Latency (5)

Low Power Verification Forum (5)

MARLUG 2024 (5)

MARLUG 2025 (5)

March 2018 - Volume 14 Issue 1 (5)

Memory Usage (5)

Model Context Protocol (5)

NVM Express (5)

Namespaces (5)

Non-Pipelined (5)

Phases (5)

Precedence (5)

Processor Core Verification (5)

Quirky (5)

Repository (5)

SFV (5)

SSD (5)

SVUnit (5)

Sequence Library (5)

Simulink (5)

Spice (5)

Split Transactor (5)

State-Based Model (5)

Static RDC (5)

Stimulus Pattern (5)

Test Class (5)

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Threads (5)

Transaction-Based Acceleration (5)

Unified Coverage Database (5)

VA Live 2019 - Westford (5)

VA Live 2023 - Westford (5)

VA Live 2024 - Huntsville (5)

VA Live 2024 - Westford (5)

VA Live 2025 - Silicon Valley (5)

VA Live 2026 - El Segundo (5)

Verbose (5)

Verification Case Document (5)

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Virtual Methods (5)

Wishbone (5)

5G (4)

BISR (4)

Bandwidth (4)

Batch and Debug (4)

Bi-Directional (4)

Bit Width (4)

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Classifications (4)

Compute Subsystems (4)

Coverage Achievement (4)

DVFS (4)

Data Link (4)

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Deprecated (4)

Design Analysis (4)

Design Creation (4)

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DisplayPort (4)

ECO (4)

ED-80 (4)

Enumeration (4)

Fault Coverage (4)

Fault Detection (4)

Fault List (4)

Formal Closure (4)

GPU (4)

HDMI (4)

Handles (4)

IC Design (4)

ICE Mode (4)

IEEE (4)

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In-Circuit Simulation (4)

In-System Test (4)

Initial States (4)

LFM (4)

Large Language Models (4)

Mathworks (4)

Metastability Injection (4)

Mitigation Architecture (4)

Non-Reset (4)

November 2018 - Volume 14 Issue 3 (4)

Objectives (4)

PCIe Gen 6 (4)

PHY (4)

Partitioning (4)

Phase Objections (4)

Plusargs (4)

Power Constraints (4)

Protocol Checkers (4)

QEMU (4)

QoR (4)

Questa Design Solutions (4)

RTL Verification (4)

Race Conditions (4)

Reset Handling (4)

Reset Signal (4)

Risk Mitigation (4)

Root Cause (4)

SVTB (4)

Semantics (4)

Specification Pattern (4)

Stream (4)

Structural Checks (4)

Subscriber (4)

Subsystem (4)

Synergistic Verification (4)

Tcl/Tk (4)

Test Ranking (4)

Time Cone (4)

Trust Verification (4)

UART (4)

UCIS (4)

UEC (4)

UPF 3.0 (4)

UPF 4.0 (4)

USB (4)

Unreachability (4)

Use Models (4)

Utilization (4)

VA Live 2023 - Austin (4)

VA Live 2024 - Austin (4)

VA Live 2024 - Fremont (4)

VA Live 2025 - Scottsdale (4)

VA Live 2026 - Austin (4)

VA Live 2026 - Silicon Valley (4)

VPM (4)

Vectors (4)

Verification Blueprint (4)

X-Aware (4)

$display (3)

1.2 (3)

AHB (3)

Affect Probability (3)

Airborne Electronic Hardware (3)

Analysis Components (3)

Analysis Port (3)

Application Lifecycle Management (3)

Arbitration (3)

Autonomous Systems (3)

Base Test (3)

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Boolean (3)

Bounded Tasks (3)

Built-In Self-Test (3)

CDC Signals (3)

CSI-2 (3)

Case Statements (3)

Cause-Effect (3)

Certification (3)

Class Variables (3)

Clock Definitions (3)

Clocking (3)

Code Quality (3)

Controllability (3)

Coroutines (3)

Cover Method (3)

Coverage Data (3)

Coverage Exclusion (3)

Cryptography (3)

Cutpoint (3)

DFT Architecture (3)

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Delay Loops (3)

Design for Safety (3)

Designers (3)

Dual Top (3)

ESL (3)

Emulatability (3)

FWHW (3)

Fault Model (3)

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First-silicon Success (3)

Golden Model (3)

HLV (3)

Hardware Architecture (3)

Hardware Assurance (3)

Horizontal Reuse (3)

Illegal Bins (3)

Integration Level (3)

Integrity Challenges (3)

Intelligent Integration (3)

JUnit (3)

July 2023 - Volume 19 Issue 2 (3)

Jump Statements (3)

Lane Margining (3)

Level-shifter (3)

Load Balancing (3)

Loggers (3)

MC2 (3)

MUX (3)

Mailboxes (3)

Mathematical Analysis (3)

Memory Debug (3)

NRRs (3)

NoC (3)

OSVVM (3)

Observer (3)

Open Architecture (3)

PCI-SIG (3)

PCIe Gen 8 (3)

Parallel Compile (3)

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Phase-Level (3)

Polymorphic Behavior (3)

Power Architecture (3)

Power Gating (3)

Profiling (3)

Protocol Layers (3)

QFL (3)

Qrun (3)

Quality Assurance (3)

RISC-V Verification Interface (3)

RTL Emulation (3)

Radiation Mitigation (3)

Re-targeting (3)

Real Number Modeling (3)

Reconfiguration (3)

Resource Utilization (3)

Routines (3)

SDC (3)

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Security Coverage (3)

Security Vulnerabilities (3)

Semaphores (3)

Sequential Optimization (3)

Serial Interface (3)

Shift Left (3)

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Singleton (3)

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State Transition (3)

Static Lists (3)

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System Verification (3)

TBX (3)

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Timing Integrity (3)

Tool Optimization (3)

Toolkit (3)

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Transitive (3)

Type Casting (3)

UEFI (3)

UVM 1.1d (3)

UVM 1.2 (3)

UVM Rapid Adoption (3)

UVMC 2.3.0 (3)

UVMC 2.3.1 (3)

UVMC 2.3.2 (3)

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VHDL-2019 (3)

VIP - 3.1 (3)

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2D/3D (2)

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ALU (2)

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ARBM (2)

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Arithmetic (2)

Assist (2)

Attribute (2)

AutoPDU (2)

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Backward Compatibility (2)

BiQuad (2)

Bidirectional (2)

Bit Flips (2)

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Bus Conflicts (2)

Bus Master (2)

C Tests (2)

C-PHY (2)

CDC Violations (2)

CDC Working Group (2)

CHI (2)

CSI (2)

Campaign Management (2)

Chains (2)

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Clock Cycle (2)

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Cover Statement (2)

Coverage Gap (2)

Coverpoint (2)

Critical Storage (2)

Cross Probing (2)

D-PHY (2)

DFT Sign-Off (2)

DFT Simulation (2)

DPPM (2)

DVCON 2021 (2)

DVCon 2026 (2)

DVCon India (2)

DVIF (2)

Data Mux (2)

Dead Code (2)

Design Checking (2)

Design Configuration (2)

Digital Signal Processing (2)

Domain Configuration (2)

Domain Topologies (2)

Downcasting (2)

Dynamic Checks (2)

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October 2013

Abstract Concrete (.tgz)
UVM - Universal Verification Methodology Oct 07, 2013 tar
Generation_seq_persistence.tgz
Standards Oct 07, 2013 tar
Generation_seq_rand.tgz
Standards Oct 07, 2013 tar
Interrupts_parallel_processing.tgz
Standards Oct 07, 2013 tar
Interrupts_prioritised.tgz
Standards Oct 07, 2013 tar
Interrupts_simple.tgz
Standards Oct 07, 2013 tar
Overriding.tgz
Standards Oct 07, 2013 tar
Priority_arbitration.tgz
Standards Oct 07, 2013 tar
Priority_grab_lock.tgz
Standards Oct 07, 2013 tar
QVIP Express (.tgz)
UVM - Universal Verification Methodology Oct 07, 2013 tar
Tb_build_ss_tb.tgz
Standards Oct 07, 2013 tar
Use_models_bidir_get_put_uvm.tgz
Standards Oct 07, 2013 tar
Use_models_bidir_item_done_uvm.tgz
Standards Oct 07, 2013 tar
Bidirectional Sequence Driver Use Model (.tgz)
UVM - Universal Verification Methodology Oct 07, 2013 Verification Methodology Team tar
Use_models_pipelined_get_put.tgz
Standards Oct 07, 2013 tar
Use_models_pipelined_item_done.tgz
Standards Oct 07, 2013 tar
Use_models_tb_build_tbx_uvm.tgz
Standards Oct 07, 2013 tar
Use_models_unidirectional.tgz
Standards Oct 07, 2013 tar
Uvm_Abstract-concrete.tgz
Standards Oct 07, 2013 tar
Uvm_generation_seq_persistence.tgz
Standards Oct 07, 2013 tar
Uvm_generation_seq_poly.tgz
Standards Oct 07, 2013 tar
Uvm_generation_seq_rand.tgz
Standards Oct 07, 2013 tar
Uvm_interrupts_prioritised.tgz
Standards Oct 07, 2013 tar
Uvm_mem_example.tgz
Standards Oct 07, 2013 tar
Verification Horizons - Volume 9, Issue 3
Standards Oct 01, 2013 Tom Fitzpatrick pdf

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October 2013

Abstract Concrete (.tgz)

Generation_seq_persistence.tgz

Generation_seq_rand.tgz

Interrupts_parallel_processing.tgz

Interrupts_prioritised.tgz

Interrupts_simple.tgz

Overriding.tgz

Priority_arbitration.tgz

Priority_grab_lock.tgz

QVIP Express (.tgz)

Tb_build_ss_tb.tgz

Use_models_bidir_get_put_uvm.tgz

Use_models_bidir_item_done_uvm.tgz

Bidirectional Sequence Driver Use Model (.tgz)

Use_models_pipelined_get_put.tgz

Use_models_pipelined_item_done.tgz

Use_models_tb_build_tbx_uvm.tgz

Use_models_unidirectional.tgz

Uvm_Abstract-concrete.tgz

Uvm_generation_seq_persistence.tgz

Uvm_generation_seq_poly.tgz

Uvm_generation_seq_rand.tgz

Uvm_interrupts_prioritised.tgz

Uvm_mem_example.tgz

Verification Horizons - Volume 9, Issue 3