Browse all content in Verification Academy: Articles, Cookbooks, Resources, Sessions, and Tracks

March 2022

• The Best Verification Strategy You’ve Never Heard Of

  Planning, Measurement and Analysis Mar 28, 2022 mp4

September 2021

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  Veloce Prototyping Solutions Accelerate Verification of HPC AI-Enabled SoCs

  Acceleration Sep 01, 2021 Stephen Bailey Article

July 2021

• Formal Verification for DO-254 (and other Safety-Critical) Designs

  Functional Safety Jul 01, 2021 Mark Eslinger pdf

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  Formal Verification for DO-254 (and other Safety-Critical) Designs

  Functional Safety Jul 01, 2021 David Landoll Paper

March 2021

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  Functional Debug: Verification and Beyond

  Debug Mar 31, 2021 Hanan Moller Webinar

• Functional Debug: Verification and Beyond

  Debug Mar 31, 2021 Hanan Moller pdf

May 2020

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  Productivity in the Questa Simulation Flow

  Simulation May 15, 2020 Gordon Allan Webinar

April 2020

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  UVM Coding Guidelines: Tips & Tricks You Probably Didn’t Know

  SystemVerilog Apr 10, 2020 Chris Spear Webinar

January 2020

• Tackling Random Blind Spots with Strategy-Driven Stimulus Generation

  Standards Jan 07, 2020 Matthew Ballance Article

July 2019

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  Portable Stimulus: Is It Revolution or Evolution?

  Portable Stimulus Jul 15, 2019 Tom Fitzpatrick Conference

• Portable Stimulus: Is It Revolution or Evolution?

  Portable Stimulus Jul 15, 2019 Tom Fitzpatrick pdf

December 2018

• Full-Featured SOC Debug Cross-Triggering

  Simulation Dec 10, 2018 Verification Methodology Team Article

June 2017

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  USB 3.1 Verification Challenges

  Verification IP Jun 13, 2017 Dinesh Tyagi Seminar

January 2017

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  Jenkins Installation and Setup

  Planning, Measurement and Analysis Jan 10, 2017 Darron May Session

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  Jenkins Project Configuration

  Planning, Measurement and Analysis Jan 10, 2017 Darron May Session

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  Jenkins VRM Integration

  Planning, Measurement and Analysis Jan 10, 2017 Darron May Demo

• The Fundamental Power States for UPF Modeling and Power Aware Verification

  Standards Jan 04, 2017 Verification Methodology Team Article

• Extending a Traditional VIP to Solve PHY Verification Challenges

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Boost Verification Results by Bridging the Hardware/Software Testbench Gap

  Simulation Jan 03, 2017 Matthew Ballance Article

• Boosting Simulation Performance of UVM Registers in High Performance Systems

  Standards Jan 03, 2017 Verification Methodology Team Article

• Easy Steps Towards Virtual Prototyping using the SystemVerilog DPI

  Simulation Jan 03, 2017 Dave Rich Article

• Register Verification: Do We Have Reliable Specification?

  Simulation Jan 03, 2017 Verification Methodology Team Article

• Sequence, Sequence on the Wall – Who's the Fairest of Them All?

  Standards Jan 03, 2017 Rich Edelman Article

• Seven Separate Sequence Styles Speed Stimulus Scenarios

  Standards Jan 03, 2017 Mark Peryer Article

• Traffic Profiling and Performance Instrumentation For On-Chip Interconnects

  Standards Jan 03, 2017 Mark Peryer Article