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Verification Horizons (249)

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March 2016 - Volume 12 Issue 1 (14)

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September 2021 - Volume 17 Issue 2 (12)

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June 2012 - Volume 8 Issue 2 (9)

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February 2013 - Volume 9 Issue 1 (8)

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July 2020 - Volume 16 Issue 2 (7)

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June 2019 - Volume 15 Issue 2 (6)

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December 2019 - Volume 15 Issue 3 (5)

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March 2018 - Volume 14 Issue 1 (5)

March 2024 - Volume 20 Issue 1 (5)

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November 2018 - Volume 14 Issue 3 (4)

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July 2023 - Volume 19 Issue 2 (3)

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Show Less

July 2022

Unblocking the Full Potential of SSDs Using Zoned and Key Value Namespaces
Verification IP Jul 05, 2022 Himani Kaushik - Siemens Eda Article
Bringing 5G NR Radio Frame Generation and Analysis to the Veloce® X-STEP™ Product Family
Acceleration Jul 05, 2022 Yrjö Keränen - Siemens Eda Article
Speeding OTN Verification Using Emulation
Acceleration Jul 05, 2022 Pradeep Gupta, Saurabh Khaitan - Siemens Eda Article
Reflections on Users’ Experiences with SVA - Part II
SystemVerilog Jul 05, 2022 Ben Cohen Article
Easy Testbench Speedups
SystemVerilog Jul 05, 2022 Eileen Hickey - Doulos Inc. Article
Functional Safety Verification Challenges for Automotive ICs
Functional Safety Jul 05, 2022 Mihajlo Katona - Veriest Article
The Path to a Safety Mechanism on an Unsafe PCIe® Sub-Module
Functional Safety Jul 05, 2022 Avnita Pal - Silicon Interfaces Article

March 2022

NVMe-oF – Simple, Invisible Fabric to Cloud Storage
Verification IP Mar 02, 2022 Dhruv Garg - Siemens Eda Article
Getting to Know Visualizer - Part I
Debug Mar 02, 2022 Rich Edelman Article
Enabling Model-Based Design for DO-254 Certification Compliance
Functional Safety Mar 02, 2022 Jake Wiltgen Article
How Do You “Qualify” Tools for DO-254 Programs?
Functional Safety Mar 02, 2022 Michelle Lange, Tammy Reeve - Patmos Engineering Services Article
Reflections on Users’ Experiences with SVA
SystemVerilog Mar 02, 2022 Ben Cohen Article
A Faster Approach to Co-Simulation Using Questa and VPI
Simulation Mar 02, 2022 Vicente Bergas, Andrew Robertson, Marco Denicolai - Bitec Article
UVVM – VHDL Verification Methodology for Faster and Better FPGA and ASIC Verification
VHDL 2008 Mar 02, 2022 Espen Tallaksen - Emlogic Article

September 2021

What Siemens’ Acquisition of OneSpin Means for Formal Verification – and You
Formal Verification Sep 01, 2021 Tom Fitzpatrick Article
Digital Thread, Digital Twin, and IC Development
Functional Safety Sep 01, 2021 Ray Salemi Article
Addressing the Trends and Challenges of Automotive IC Development
Functional Safety Sep 01, 2021 Ann Keffer Article
Deploying HLS in a DO-254/ED-80 Workflow
Functional Safety Sep 01, 2021 Tammy Reeve - Patmos Engineering Services Article
Hardware-Assisted Verification Through the Years
Acceleration Sep 01, 2021 Jean-Marie Brunet Article
Veloce Hardware-Assisted Verification – Complete, Unified, and Progressive
Acceleration Sep 01, 2021 Jean-Marie Brunet Article
Veloce Prototyping Solutions Accelerate Verification of HPC AI-Enabled SoCs
Acceleration Sep 01, 2021 Stephen Bailey Article
"Hug the Debug" – Before It’s Too Late
Debug Sep 01, 2021 Sumit Vishwakarma Article
Questa Visualizer Adds Coverage Analysis to the Platform
Debug Sep 01, 2021 Yara Esam - Siemens Eda Article
Verifying a DDR5 Memory Subsystem
Verification IP Sep 01, 2021 Kamlesh Mulchandani Article
Expediting Simulation Turn-around Time with Incremental Build Flow
Simulation Sep 01, 2021 Neil Johnson Article

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Browse all Articles in Siemens Verification Academy

Search Results - 294 results

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July 2022

Unblocking the Full Potential of SSDs Using Zoned and Key Value Namespaces

Bringing 5G NR Radio Frame Generation and Analysis to the Veloce® X-STEP™ Product Family

Speeding OTN Verification Using Emulation

Reflections on Users’ Experiences with SVA - Part II

Easy Testbench Speedups

Functional Safety Verification Challenges for Automotive ICs

The Path to a Safety Mechanism on an Unsafe PCIe® Sub-Module

March 2022

NVMe-oF – Simple, Invisible Fabric to Cloud Storage

Getting to Know Visualizer - Part I

Enabling Model-Based Design for DO-254 Certification Compliance

How Do You “Qualify” Tools for DO-254 Programs?

Reflections on Users’ Experiences with SVA

A Faster Approach to Co-Simulation Using Questa and VPI

UVVM – VHDL Verification Methodology for Faster and Better FPGA and ASIC Verification

September 2021

What Siemens’ Acquisition of OneSpin Means for Formal Verification – and You

Digital Thread, Digital Twin, and IC Development

Addressing the Trends and Challenges of Automotive IC Development

Deploying HLS in a DO-254/ED-80 Workflow

Hardware-Assisted Verification Through the Years

Veloce Hardware-Assisted Verification – Complete, Unified, and Progressive

Veloce Prototyping Solutions Accelerate Verification of HPC AI-Enabled SoCs

"Hug the Debug" – Before It’s Too Late

Questa Visualizer Adds Coverage Analysis to the Platform

Verifying a DDR5 Memory Subsystem

Expediting Simulation Turn-around Time with Incremental Build Flow