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March 2016 - Volume 12 Issue 1 (5)

Matlab (5)

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March 2015 - Volume 11 Issue 1 (4)

March 2024 - Volume 20 Issue 1 (4)

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VA Live 2023 - Austin (4)

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December 2017 - Volume 13 Issue 3 (3)

Design Analysis (3)

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July 2022 - Volume 18 Issue 2 (3)

June 2015 - Volume 11 Issue 2 (3)

March 2020 - Volume 16 Issue 1 (3)

March 2021 - Volume 17 Issue 1 (3)

Memory Models (3)

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October 2012 - Volume 8 Issue 3 (3)

Parallel Simulation (3)

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Python (3)

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UPF 4.0 (3)

UVMC 2.3.3 (3)

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VA Live 2019 - Westford (3)

VA Live 2024 - Austin (3)

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Variable (3)

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2.5D (2)

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DVFS (2)

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Data Link (2)

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December 2019 - Volume 15 Issue 3 (2)

December 2022 - Volume 18 Issue 3 (2)

Design Checking (2)

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GLS (2)

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IC Design (2)

IEEE (2)

IEEE 754 (2)

IP Integration (2)

ISA (2)

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Implementation Driven Formal (2)

Instance Mapping (2)

Intelligent Integration (2)

Interconnect Signals (2)

Jittering (2)

June 2013 - Volume 9 Issue 2 (2)

June 2014 - Volume 10 Issue 2 (2)

Lockstep (2)

Loggers (2)

Logic Cone (2)

MIPI (2)

Machine Readable Specification (2)

March 2014 - Volume 10 Issue 1 (2)

March 2017 - Volume 13 Issue 1 (2)

March 2022 - Volume 18 Issue 1 (2)

Metastable (2)

Metric Validation (2)

Mixed-Signal Design (2)

Modules (2)

Monitor (2)

NVM Express (2)

Non-Determinism (2)

Object Oriented Programming (2)

October 2013 - Volume 9 Issue 3 (2)

OnChip (2)

Open Architecture (2)

PAM4 (2)

PCI-SIG (2)

PCIe Gen 7 (2)

PMHF (2)

Parameter (2)

Parameter-to-Signal (2)

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Partitioning (2)

Pattern Splitting (2)

Point-to-Point Connections (2)

Polymorphism (2)

Post-silicon Debug (2)

Power Architecture (2)

Power Profiling (2)

Power Reduction (2)

Precedence (2)

Profiling (2)

Questa Design Solutions (2)

RDC Analysis (2)

RDC Violations (2)

Re-targeting (2)

Reference Model (2)

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SFV (2)

SLM (2)

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Scoreboard (2)

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Shift Left (2)

Sign-Off Methodology (2)

Silicon Lifecycle Management (2)

Spice (2)

Split Transactor (2)

State Preservation (2)

Static & Formal Adoption (2)

Stimulus Free Verification (2)

Sub-system (2)

Sub-system Level (2)

Successive Refinement (2)

Supply Chain (2)

System-in-Package (2)

TLM FIFOS (2)

Test Environment (2)

Test Planning (2)

Test Ranking (2)

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Time Cone (2)

UALink (2)

UPF 2.0 (2)

USB (2)

UVMC 2.3.0 (2)

UVMC 2.3.1 (2)

UVMC 2.3.2 (2)

Universal Approximation (2)

Unreachability (2)

VRM (2)

VbyOne (2)

Verification Cycles (2)

Virtual Prototyping (2)

X-Mitigation (2)

X-Pessimism (2)

X-State (2)

osmosis 2024 A&D (2)

$display (1)

3PIP (1)

AHB (1)

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AOP (1)

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API (1)

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CSI (1)

CSI-2 (1)

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D-PHY (1)

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Data Types (1)

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Design.bin (1)

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Dynamic CDC (1)

Dynamic Power (1)

ED-80 (1)

EMC (1)

Elliptic Curve (1)

Embedded Analytics (1)

Embedded Software (1)

Emerging Trends (1)

Enterprise Debug and Analysis (1)

Execution Trace (1)

Factory (1)

Fault Coverage (1)

February 2013 - Volume 9 Issue 1 (1)

February 2019 - Volume 15 Issue 1 (1)

Fibre Channel (1)

Flash (1)

Flip-Flop (1)

Formal Test Planning (1)

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Front and Back Door (1)

Functional Monitoring (1)

GPU (1)

Generation (1)

Golden Model (1)

HSI (1)

HYCON (1)

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Host Processor (1)

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IEC 62304 (1)

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In-Circuit Emulation (1)

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Instance (1)

Integer (1)

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Interoperability (1)

Interrupts (1)

Japanese (1)

July 2020 - Volume 16 Issue 2 (1)

July 2023 - Volume 19 Issue 2 (1)

June 2012 - Volume 8 Issue 2 (1)

June 2016 - Volume 12 Issue 2 (1)

June 2017 - Volume 13 Issue 2 (1)

June 2018 - Volume 14 Issue 2 (1)

June 2019 - Volume 15 Issue 2 (1)

LSTM (1)

Logic Faults (1)

Low Latency (1)

MCPs (1)

MUX (1)

March 2018 - Volume 14 Issue 1 (1)

March 2023 - Volume 19 Issue 1 (1)

Marvell (1)

Mathworks (1)

Memory BIST (1)

Memory Debug (1)

Memory Usage (1)

Model-Based Design (1)

Multi-Cycle Paths (1)

Multi-Language Environment (1)

NAND (1)

NLP (1)

Namespaces (1)

Non-Trivial Bug Escapes (1)

November 2015 - Volume 11 Issue 3 (1)

November 2016 - Volume 12 Issue 3 (1)

November 2018 - Volume 14 Issue 3 (1)

November 2020 - Volume 16 Issue 3 (1)

OSCI (1)

Objectives (1)

Objects (1)

Observer (1)

PCIe Gen 4 (1)

PHY (1)

Partitioned Compile (1)

Phases (1)

Phrase Configuration (1)

Power Gating (1)

Pre-Silicon (1)

Productivity Gap (1)

Property Analysis (1)

Property Editor (1)

Prototyping (1)

QOS Processor (1)

RAM (1)

RDC Methodology (1)

RDMA (1)

RISC-V Verification Interface (1)

RNG (1)

RTL Emulation (1)

RTL-Aware Design (1)

Re-Spins (1)

Receiver (1)

Recording (1)

Recurrent Neural Networks (1)

Release Notes (1)

Repair Architecture (1)

Reporting (1)

Reset Handling (1)

Reset Tree (1)

Respins (1)

Root Complex (1)

Run Monitor (1)

SATA (1)

SCE-MI (1)

SOTIF (1)

SPDM (1)

SPI (1)

SSD (1)

SafeSPI (1)

Safety Monitoring (1)

Scenario Generation (1)

Security Protocol and Data Model (1)

Sequencer (1)

Sequential Optimization (1)

Signal Processing Domain (1)

Single Root-IO Virtualization (1)

Singleton (1)

Softmodel (1)

Software Layers (1)

Specification Driven Formal (1)

Spiral Refinement (1)

Static CDC (1)

Strategy (1)

Sub-Module (1)

Subscriber (1)

Supply Set (1)

System Level (1)

Systemic Faults (1)

TBX (1)

TPU (1)

Tcl/Tk (1)

Test Compression (1)

Test Coverage (1)

Test Generation (1)

Tool Confidence Level (1)

Tool Detection (1)

Tool Impact (1)

Trace Depth (1)

Transaction Layer (1)

Transactional Assertions (1)

Transactors (1)

Transmitter IP (1)

Tunneling (1)

UCIS (1)

UEC (1)

UPF 3.1 (1)

USB 3.0 (1)

USB 3.1 (1)

UVM Simulation (1)

UVM-MS (1)

UVMC 2.1.4 (1)

UVMC 2.2 (1)

UVVM (1)

Ultra Accelerator Link (1)

Unary (1)

Unidirectional (1)

Use Models (1)

VA Live 2023 - El Segundo (1)

VC File (1)

VCMs (1)

VIP - 3.1 (1)

Values (1)

Verbose (1)

Verbosity (1)

Verification Architecture (1)

Verification Component (1)

Verification Run Manager (1)

Virtual Equivalence (1)

Virtual Methods (1)

WRG (1)

Wall-Clock Run-Time (1)

X-Optimism (1)

XML (1)

YAML (1)

eFuse (1)

Show Less

February 2015

UVM Connect 2.3 Kit
UVMC Feb 18, 2015 John Stickley tar

March 2014

Matlab Integration
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Emulation
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Taming Power Aware Bugs with Questa®
Low Power Mar 31, 2014 Gaurav Jalan - Smartplay Technologies Article
Stories of an AMS Verification Dude: Putting Stuff Together
Analog Mixed-Signal Mar 31, 2014 Martin Vlach Article
Separate Top-Level Modules
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Split Transactors
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Back Pointers
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Defining an API
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter
Emulation-Ready Testbench Examples
UVM - Universal Verification Methodology Mar 31, 2014 Verification Methodology Team Chapter

October 2013

Software-Driven Testing of AXI Bus in a Dual Core ARM® System
Portable Stimulus Oct 01, 2013 Mark Olen Article
Simulation + Emulation = Verification Success
Acceleration Oct 01, 2013 Lanfranco Salinari, Alberto Allara, And Alessandro Daolio - Stmicroelectronics Article

September 2013

UVM Connect Guide
UVMC Sep 08, 2013 Adam Erickson pdf

June 2013

Non-invasive Software Verification Using Vista Virtual Platforms
Functional Safety Jun 01, 2013 Alex Rozenman, Vladimir Pilko, Nilay Mitash - Siemens Eda Article
Confidence in the Face of the Unknown: X-state Verification
Formal Verification Jun 01, 2013 Kaowen Liu - Mediatek Inc., Roger Sabbagh - Siemens Eda Article