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March 2016 - Volume 12 Issue 1 (5)

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December 2017 - Volume 13 Issue 3 (3)

Design Cycle (3)

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July 2022 - Volume 18 Issue 2 (3)

June 2015 - Volume 11 Issue 2 (3)

March 2020 - Volume 16 Issue 1 (3)

March 2021 - Volume 17 Issue 1 (3)

Memory Models (3)

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October 2012 - Volume 8 Issue 3 (3)

PCIe Gen 7 (3)

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UVMC 2.3.3 (3)

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Unified Coverage Database (3)

VA Live 2019 - Westford (3)

VA Live 2024 - Austin (3)

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DVCON 2021 (2)

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December 2019 - Volume 15 Issue 3 (2)

December 2022 - Volume 18 Issue 3 (2)

Design Checking (2)

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Digital Signal Processing (2)

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Elements List (2)

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GLS (2)

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IEEE (2)

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ISA (2)

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Instantiate (2)

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Interconnect Signals (2)

Jittering (2)

June 2013 - Volume 9 Issue 2 (2)

June 2014 - Volume 10 Issue 2 (2)

LVS (2)

Level-shifter (2)

Lockstep (2)

Loggers (2)

Logic Cone (2)

MIPI (2)

Machine Readable Specification (2)

March 2014 - Volume 10 Issue 1 (2)

March 2017 - Volume 13 Issue 1 (2)

March 2022 - Volume 18 Issue 1 (2)

Metastable (2)

Metric Validation (2)

Mixed-Signal Design (2)

Modules (2)

Monitor (2)

Multi-Language Environment (2)

Non-Determinism (2)

Object Oriented Programming (2)

October 2013 - Volume 9 Issue 3 (2)

OnChip (2)

Open Architecture (2)

PAM4 (2)

PCI-SIG (2)

PMHF (2)

Parameter (2)

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Parameterized Tests (2)

Partitioning (2)

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Point-to-Point Connections (2)

Polymorphism (2)

Power Profiling (2)

Power Reduction (2)

Precedence (2)

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QCX (2)

Questa Design Solutions (2)

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RDC Violations (2)

Re-targeting (2)

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Scoreboard (2)

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Shift Left (2)

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Spice (2)

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Strategy (2)

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$display (1)

2.5D (1)

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D-PHY (1)

DVCon Europe (1)

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Dynamic CDC (1)

ED-80 (1)

EMC (1)

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Elliptic Curve (1)

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Embedded Software (1)

Emerging Trends (1)

Enterprise Debug and Analysis (1)

Execution Trace (1)

Factory (1)

Fault Coverage (1)

February 2013 - Volume 9 Issue 1 (1)

February 2019 - Volume 15 Issue 1 (1)

Fibre Channel (1)

Flash (1)

Flip-Flop (1)

Floating-Point Hardware (1)

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GPU (1)

Generation (1)

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IDE (1)

IEC 62304 (1)

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IP Quality (1)

In-Circuit Emulation (1)

In-System Test (1)

Instance (1)

Integer (1)

Integration Level (1)

Interrupts (1)

Japanese (1)

July 2020 - Volume 16 Issue 2 (1)

July 2023 - Volume 19 Issue 2 (1)

June 2012 - Volume 8 Issue 2 (1)

June 2016 - Volume 12 Issue 2 (1)

June 2017 - Volume 13 Issue 2 (1)

June 2018 - Volume 14 Issue 2 (1)

June 2019 - Volume 15 Issue 2 (1)

LSTM (1)

Logic Faults (1)

Low Latency (1)

MCPs (1)

MUX (1)

March 2018 - Volume 14 Issue 1 (1)

March 2023 - Volume 19 Issue 1 (1)

Marvell (1)

Mathworks (1)

Measurement (1)

Memory BIST (1)

Memory Debug (1)

Memory Usage (1)

Model-Based Design (1)

Multi-Cycle Paths (1)

NAND (1)

NLP (1)

NRRs (1)

Non-Resettable Registers (1)

Non-Trivial Bug Escapes (1)

November 2015 - Volume 11 Issue 3 (1)

November 2016 - Volume 12 Issue 3 (1)

November 2018 - Volume 14 Issue 3 (1)

November 2020 - Volume 16 Issue 3 (1)

Objectives (1)

Objects (1)

Observer (1)

PCIe Gen 4 (1)

PHY (1)

Partitioned Compile (1)

Phases (1)

Phrase Configuration (1)

Portability (1)

Power Gating (1)

Pre-Silicon (1)

Productivity Gap (1)

Property Editor (1)

Prototyping (1)

QEMU (1)

QOS Processor (1)

RAM (1)

RDC Methodology (1)

RDMA (1)

RISC-V Verification Interface (1)

RNG (1)

RTL Emulation (1)

RTL-Aware Design (1)

Re-Spins (1)

Receiver (1)

Recording (1)

Recurrent Neural Networks (1)

Release Notes (1)

Repair Architecture (1)

Reporting (1)

Reset Environment (1)

Reset Tree (1)

Respins (1)

Root Complex (1)

Run Monitor (1)

SA-EDI (1)

SATA (1)

SCE-MI (1)

SOTIF (1)

SPDM (1)

SPI (1)

SafeSPI (1)

Safety Monitoring (1)

Scenario Generation (1)

Security Asset (1)

Security Coverage (1)

Security Protocol and Data Model (1)

Semantics (1)

Sequencer (1)

Sequential Errors (1)

Sequential Optimization (1)

Signal Processing Domain (1)

Single Root-IO Virtualization (1)

Singleton (1)

Softmodel (1)

Software Layers (1)

Static CDC (1)

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Static RDC (1)

Sub-Module (1)

Subscriber (1)

Supply Set (1)

Syntax (1)

Systemic Faults (1)

TBX (1)

TDISP (1)

TPU (1)

Test Compression (1)

Test Coverage (1)

Tool Confidence Level (1)

Tool Detection (1)

Tool Impact (1)

Trace Depth (1)

Transaction Layer (1)

Transactional Assertions (1)

Transactors (1)

Transmitter IP (1)

Tunneling (1)

UCIS (1)

UEC (1)

UPF 3.1 (1)

USB 3.0 (1)

USB 3.1 (1)

UVM Simulation (1)

UVM-MS (1)

UVMC 2.1.4 (1)

UVMC 2.2 (1)

UVVM (1)

Unary (1)

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Use Models (1)

VA Live 2023 - El Segundo (1)

VC File (1)

VCMs (1)

VIP - 3.1 (1)

Values (1)

VbyOne (1)

Vectors (1)

Verbose (1)

Verbosity (1)

Verification Component (1)

Verification Run Manager (1)

Virtual Equivalence (1)

Virtual Methods (1)

WRG (1)

Wall-Clock Run-Time (1)

X-Optimism (1)

XML (1)

YAML (1)

eFuse (1)

Show Less

June 2018

It’s Not My Fault! How to Run a Better Fault Campaign Using Formal
Functional Safety Jun 29, 2018 Doug Smith Article

May 2018

Instant Formal Expert
Formal Verification May 14, 2018 Dr. Jeremy Levitt Session
Instant Formal Expert
Formal Verification May 14, 2018 pdf
What is Formal, Anyway?
Formal Verification May 14, 2018 Doug Smith Session

April 2018

UVMF & Emulation
UVM Framework Apr 16, 2018 Mike Horn pdf

March 2018

How Formal Reduces Fault Analysis for ISO 26262
Functional Safety Mar 27, 2018 Doug Smith Conference
Requirement Tracing in the ISO 26262 World
Functional Safety Mar 27, 2018 Charles Battikha Webinar
ISO 26262: Compliant Verification From Analysis to Fault Campaigns
Functional Safety Mar 27, 2018 Doug Smith Conference
Comprehensive Metrics-Based Methodology to Achieve Low Power SoCs
Low Power Mar 07, 2018 Ellie Burns Webinar
UVMF & Emulation
UVM Framework Mar 04, 2018 Mike Horn Session
From Power Intent to Microarchitectural Checks of Low-Power Designs - Part 1
Low Power Mar 01, 2018 Progyna Khondkar Article

December 2017

Step-by-Step Tutorial for Connecting Questa VIP into the Processor Verification Flow
Verification IP Dec 05, 2017 Marcela Zachariasova, Lubos Moravec - Codasip, Ltd. Article
Reset Verification in SoC Designs
Reset-Domain Crossing Dec 05, 2017 Kurt Takara Article
Debugging Inconclusive Assertions and a Case Study
Formal Verification Dec 05, 2017 Jin Hou Article

November 2017

UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley pdf
UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley tar
UVM Connect 2.3.1 Kit
UVMC Nov 07, 2017 John Stickley tar

October 2017

DO-254 for FPGAs
Functional Safety Oct 17, 2017 Alex Grove - Siemens Eda pdf
Measuring ISO 26262 Metrics of Analog Circuitry in ICs
Functional Safety Oct 10, 2017 Stephen Sunter - Siemens Eda pdf
Measuring ISO 26262 Metrics of Analog Circuitry in ICs
Functional Safety Oct 10, 2017 Stephen Sunter Paper
Editor Insight
Formal Verification Oct 10, 2017 Harry Foster Session
Easy Solutions
Formal Verification Oct 10, 2017 Jin Hou Session
Assertion Complexity Reduction
Formal Verification Oct 10, 2017 Jin Hou Session
Design Complexity Reduction
Formal Verification Oct 10, 2017 Jin Hou Session
Advanced Topics
Formal Verification Oct 10, 2017 Jin Hou Session

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Close Coverage Faster with Questa One Sim's Unreachability Analysis

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Wednesday, Feb 11th-12:00 PM PST

Don’t Miss CDC Bugs in Low Power Designs!: Formal Meets Power Aware CDC

PCIe® Gen7 Webinar

Wednesday, Feb 18th-10:00 AM PST

Securing Next-Generation Interconnects: PCIe® Gen7 Security Verification

VA Live Austin

Thursday, Feb 19th-7:30 AM PST

Discussing the AI/ML paradigm shift across the industry.

VA Live El Segundo

Tuesday, Feb 24th-9:30 AM PST

Discussing the latest advancements in RTL simulation.

FPU Verification Webinar

Wednesday, Feb 25th-8:00 AM PST

AI Assisted FPU Verification Using Questa One SFV

New White Papers!

Formal, Avery VIP, Coverage, UPF, Functional Safety and More!

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