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osmosis Europe 2025 (15)

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Israel Static & Formal Tech Day (7)

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VA Live 2023 - Huntsville (7)

VHDL-2008 (7)

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March 2016 - Volume 12 Issue 1 (5)

Mixed-Signal Verification (5)

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PSL (5)

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VA Live 2023 - Westford (5)

VA Live 2024 - El Segundo (5)

VA Live 2024 - San Diego (5)

VA Live 2025 - El Segundo (5)

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MBIST (4)

March 2015 - Volume 11 Issue 1 (4)

March 2024 - Volume 20 Issue 1 (4)

Memory Usage (4)

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Multi-Die (4)

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OSCI (4)

PCIe Gen 6 (4)

PSS (4)

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QoR (4)

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SVTB (4)

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Tessent Test Solutions (4)

UPF 4.0 (4)

VA Live 2023 - Austin (4)

VA Live 2024 - Huntsville (4)

VA Live 2024 - Westford (4)

VA Live 2025 - Huntsville (4)

VA Live 2026 - El Segundo (4)

Validation (4)

Verification Architecture (4)

Voltage Domain Crossing (4)

Waivers (4)

Whats New in Functional Verification (4)

Wilson Research Group (4)

X-Aware (4)

ATPG (3)

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Analysis Port (3)

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Block Level (3)

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Checkpoint (3)

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Command API (3)

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Converters (3)

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Cryptography (3)

Customization (3)

DDR (3)

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December 2017 - Volume 13 Issue 3 (3)

Design Constraints (3)

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Development Environment (3)

Directed Test (3)

Dynamic Power (3)

ECO (3)

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HDL Domain (3)

HLV (3)

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Hardware Verification (3)

High-Speed (3)

IC Design (3)

IP Integration (3)

IP Security (3)

Initial States (3)

JEDEC (3)

July 2022 - Volume 18 Issue 2 (3)

June 2015 - Volume 11 Issue 2 (3)

March 2020 - Volume 16 Issue 1 (3)

March 2021 - Volume 17 Issue 1 (3)

Mathematical Analysis (3)

Memory Models (3)

Multi-Core Architectures (3)

Namespaces (3)

Objectives (3)

October 2012 - Volume 8 Issue 3 (3)

Parallel Simulation (3)

Power Architecture (3)

Processor Core Verification (3)

Protocol Checkers (3)

Python (3)

QFL (3)

RDC Design (3)

RTL Sign-Off (3)

RTL Verification (3)

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SSD (3)

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Scalable Verification (3)

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Simulink (3)

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State Machine (3)

State Transitions (3)

Static Checks (3)

System Level (3)

Tcl/Tk (3)

Transfer Protocols (3)

Trends (3)

Trust Verification (3)

UALink (3)

UVMC 2.3.3 (3)

UVMC 2.3.4 (3)

Unified Coverage Database (3)

VA Live 2019 - Westford (3)

VA Live 2024 - Austin (3)

VA Live 2024 - Fremont (3)

Variable (3)

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Virtual Interface (3)

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2D/3D (2)

5G (2)

ADAS (2)

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Abstract Specification (2)

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Adaptive (2)

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Arrays (2)

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C (2)

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CHI (2)

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Certification (2)

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Configuration Database (2)

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Critical Storage (2)

Cross Coverage (2)

Cutpoint (2)

DPPM (2)

DVCON 2021 (2)

DVFS (2)

Data Encryption (2)

Data Link (2)

Debug Methodology (2)

December 2019 - Volume 15 Issue 3 (2)

December 2022 - Volume 18 Issue 3 (2)

Design Checking (2)

Design Creation (2)

Design for Safety (2)

Digital Signal Processing (2)

Distributed Resource Management (2)

Elements List (2)

Ethernet (2)

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Fault Model (2)

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Flip-Flop (2)

Floating-Point Hardware (2)

Formal Simulation (2)

GLS (2)

GOMACTech (2)

Governance (2)

Graph-Based Stimulus (2)

Hallucination (2)

Hardening (2)

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Heterogeneous (2)

IEEE (2)

IEEE 754 (2)

IP-XACT (2)

ISA (2)

Illegal Bins (2)

Implementation Model (2)

Implicit/Explicit (2)

In-Circuit Simulation (2)

Instance (2)

Instance Mapping (2)

Instantiate (2)

Intelligent Integration (2)

Interconnect Signals (2)

Jittering (2)

June 2013 - Volume 9 Issue 2 (2)

June 2014 - Volume 10 Issue 2 (2)

LVS (2)

Level-shifter (2)

Lockstep (2)

Loggers (2)

Logic Cone (2)

MCPs (2)

MIPI (2)

Machine Readable Specification (2)

March 2014 - Volume 10 Issue 1 (2)

March 2017 - Volume 13 Issue 1 (2)

March 2022 - Volume 18 Issue 1 (2)

Metastable (2)

Metric Validation (2)

Mixed-Signal Design (2)

Modules (2)

Monitor (2)

Multi-Language Environment (2)

Non-Determinism (2)

Object Oriented Programming (2)

Objects (2)

October 2013 - Volume 9 Issue 3 (2)

OnChip (2)

Open Architecture (2)

PAM4 (2)

PCI-SIG (2)

PCIe Gen 7 (2)

PMHF (2)

Parameter (2)

Parameter-to-Signal (2)

Parameterized Tests (2)

Partitioning (2)

Pattern Splitting (2)

Point-to-Point Connections (2)

Polymorphism (2)

Power Profiling (2)

Power Reduction (2)

Precedence (2)

Profiling (2)

QCX (2)

Questa Design Solutions (2)

RDC Analysis (2)

RDC Violations (2)

RTL-Aware Design (2)

Re-targeting (2)

Reference Model (2)

Reset Handling (2)

Reset Value (2)

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Runtime (2)

SFV (2)

SLM (2)

SPFM (2)

Scoreboard (2)

Security Vulnerabilities (2)

Shift Left (2)

Sign-Off Methodology (2)

Silicon Lifecycle Management (2)

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Spice (2)

Split Transactor (2)

State Preservation (2)

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Sub-system (2)

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Supply Chain (2)

Synthesizable (2)

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TLM FIFOS (2)

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UPF 2.0 (2)

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USB (2)

UVMC 2.3.0 (2)

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Ultra Accelerator Link (2)

Universal Approximation (2)

Unreachability (2)

VA Live 2026 - Austin (2)

VRM (2)

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X-Pessimism (2)

X-State (2)

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$display (1)

2.5D (1)

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3PIP (1)

AHB (1)

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AXI (1)

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Agent (1)

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Alternate Routing ID (1)

Analysis Components (1)

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Block to Chip (1)

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C-PHY (1)

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CSI (1)

CSI-2 (1)

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Code Example (1)

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Component Measurement and Authentication (1)

Compute Express Link (1)

Config_db (1)

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Control Points (1)

Controller Area Network (1)

Counterexample (1)

Cover Property (1)

Coverage Achievement (1)

Coverage Models (1)

D-PHY (1)

DVCon 2026 (1)

DVCon Europe (1)

Data Corruption (1)

Design Specification (1)

Design.bin (1)

Determinism (1)

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DisplayPort (1)

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Dynamic CDC (1)

ED-80 (1)

EMC (1)

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Elliptic Curve (1)

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Embedded Software (1)

Emerging Trends (1)

Enterprise Debug and Analysis (1)

Execution Trace (1)

Factory (1)

Fault Coverage (1)

February 2013 - Volume 9 Issue 1 (1)

February 2019 - Volume 15 Issue 1 (1)

Fibre Channel (1)

Flash (1)

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GPU (1)

Generation (1)

Golden Model (1)

HDMI (1)

HSI (1)

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Host Processor (1)

IC/ASIC (1)

IEC 62304 (1)

IP Integrator (1)

IP Quality (1)

In-Circuit Emulation (1)

In-System Test (1)

Integer (1)

Integration Level (1)

Interrupts (1)

Japanese (1)

July 2020 - Volume 16 Issue 2 (1)

July 2023 - Volume 19 Issue 2 (1)

June 2012 - Volume 8 Issue 2 (1)

June 2016 - Volume 12 Issue 2 (1)

June 2017 - Volume 13 Issue 2 (1)

June 2018 - Volume 14 Issue 2 (1)

June 2019 - Volume 15 Issue 2 (1)

LSTM (1)

Logic Faults (1)

Low Latency (1)

MUX (1)

March 2018 - Volume 14 Issue 1 (1)

March 2023 - Volume 19 Issue 1 (1)

Marvell (1)

Mathworks (1)

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Memory BIST (1)

Memory Debug (1)

Model Context Protocol (1)

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Multi-Cycle Paths (1)

NAND (1)

NLP (1)

NRRs (1)

Non-Resettable Registers (1)

Non-Trivial Bug Escapes (1)

November 2015 - Volume 11 Issue 3 (1)

November 2016 - Volume 12 Issue 3 (1)

November 2018 - Volume 14 Issue 3 (1)

November 2020 - Volume 16 Issue 3 (1)

Observer (1)

PCIe Gen 4 (1)

PHY (1)

Partitioned Compile (1)

Phases (1)

Phrase Configuration (1)

Portability (1)

Power Consumption (1)

Power Gating (1)

Pre-Silicon (1)

Productivity Gap (1)

Property Editor (1)

Prototyping (1)

QEMU (1)

QOS Processor (1)

RAM (1)

RDC Methodology (1)

RDMA (1)

RISC-V Verification Interface (1)

RNG (1)

RTL Emulation (1)

Re-Spins (1)

Receiver (1)

Recording (1)

Recurrent Neural Networks (1)

Release Notes (1)

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Reporting (1)

Reset Environment (1)

Reset Tree (1)

Respins (1)

Root Complex (1)

Run Monitor (1)

SA-EDI (1)

SATA (1)

SCE-MI (1)

SOTIF (1)

SPDM (1)

SPI (1)

SafeSPI (1)

Safety Monitoring (1)

Scenario Generation (1)

Security Asset (1)

Security Protocol and Data Model (1)

Semantics (1)

Sequencer (1)

Sequential Errors (1)

Sequential Optimization (1)

Signal Processing Domain (1)

Single Root-IO Virtualization (1)

Singleton (1)

Softmodel (1)

Software Layers (1)

Static CDC (1)

Static RDC (1)

Sub-Module (1)

Subscriber (1)

Supply Set (1)

Syntax (1)

Systemic Faults (1)

TBX (1)

TPU (1)

Test Compression (1)

Test Coverage (1)

Tool Confidence Level (1)

Tool Detection (1)

Tool Impact (1)

Trace Depth (1)

Transaction Layer (1)

Transactional Assertions (1)

Transactors (1)

Transmitter IP (1)

Tunneling (1)

UCIS (1)

UEC (1)

UPF 3.1 (1)

USB 3.0 (1)

USB 3.1 (1)

UVM Simulation (1)

UVM-MS (1)

UVMC 2.1.4 (1)

UVMC 2.2 (1)

UVVM (1)

Unary (1)

Unidirectional (1)

Use Models (1)

VA Live 2023 - El Segundo (1)

VC File (1)

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VIP - 3.1 (1)

Values (1)

VbyOne (1)

Verbose (1)

Verbosity (1)

Verification Component (1)

Verification Run Manager (1)

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WRG (1)

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X-Optimism (1)

XML (1)

YAML (1)

eFuse (1)

Show Less

May 2023

Efficient Interconnect Formal Verification for Complex, Large-scale Designs
Formal Verification May 17, 2023 Nicolae Tusinschi pdf

April 2023

Delivering First Silicon Success for Your Next SoC or 3DIC
Verification IP Apr 25, 2023 Gordon Allan pdf
Delivering First Silicon Success for Your Next SoC or 3DIC
Verification IP Apr 25, 2023 Gordon Allan Webinar
Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data
Verification IQ Apr 11, 2023 Darron May Webinar

March 2023

Continuous Integration (CI) Driving Efficient Program Execution
Questa Design Solutions Mar 28, 2023 Kevin Campbell Webinar
Continuous Integration (CI) driving efficient program execution
Questa Design Solutions Mar 28, 2023 Kevin Campbell pdf
Rapid Testbench Development
UVM Framework Mar 07, 2023 Bob Oden pdf

February 2023

A Formal-based Approach for Efficient RISC-V Processor Verification
Formal Verification Feb 24, 2023 Laurent Arditi, Paul Sargent, Thomas Aird, Lauranne Choquin - Codasip Article
Big Data for Verification – Inspiration from Large Language Models
Machine Learning Feb 24, 2023 Dan Yu link

January 2023

Verification Data Analytics with Machine Learning
Machine Learning Jan 25, 2023 Dan Yu Paper
Verification Data Analytics with Machine Learning
Machine Learning Jan 25, 2023 Dan Yu pdf
Intelligent Requirements Traceability for ISO 26262
Functional Safety Jan 18, 2023 Jake Wiltgen Paper
Intelligent Requirements Traceability for ISO 26262
Functional Safety Jan 18, 2023 Jake Wiltgen pdf

December 2022

The State of Functional Verification: Crisis or Opportunity?
Formal Verification Dec 08, 2022 Harry Foster pdf
The State of Functional Verification: Crisis or Opportunity?
Formal Verification Dec 08, 2022 Harry Foster mp4
EC-FPGA Updates with an Introduction to Instance Mapping
Formal Verification Dec 08, 2022 Kevin Urish pdf
EC-FPGA Updates with an Introduction to Instance Mapping
Formal Verification Dec 08, 2022 Kevin Urish mp4
UPEC: Side Channel Detection with Formal Verification
Formal Verification Dec 08, 2022 Keerthi Devraj mp4
UPEC: Side Channel Detection with Formal Verification
Formal Verification Dec 08, 2022 Keerthi Devraj pdf
A Novel Approach to Formal FW/HW Co-verification
Formal Verification Dec 08, 2022 Djones Lettnin mp4
A Novel Approach to Formal FW/HW Co-verification
Formal Verification Dec 08, 2022 Djones Lettnin pdf
Crossing the RISC-V Customization Barrier with Formal
Formal Verification Dec 08, 2022 Pascal Gouedo pdf
Crossing the RISC-V Customization Barrier with Formal
Formal Verification Dec 08, 2022 Pascal Gouedo mp4
Accelerator Quick Error Detection: Verification of Hardware Accelerators
Formal Verification Dec 08, 2022 Saranyu Chattopadhyay pdf
Accelerator Quick Error Detection: Verification of Hardware Accelerators
Formal Verification Dec 08, 2022 Saranyu Chattopadhyay mp4

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