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June 2017

Parallel Debug: A Path to a Better Big Data Diaspora
Verification Management Jun 28, 2017 Hamilton Carter - Siemens Eda Article
Portable Stimulus Modeling in a High-Level Synthesis User's Verification Flow
Standards Jun 28, 2017 Mike Andrews, Mike Fingeroff - Siemens Eda Article
Smoothing the Path to Software-Driven Verification with Portable Stimulus
Standards Jun 28, 2017 Matthew Ballance Article
Verification Planning with Questa Verification Management
Verification Management Jun 28, 2017 Darron May Article
MIPI® CSI2 TX IP Verification Using Questa Verification IPs
Verification IP Jun 28, 2017 Ivan Ristic Article
Converting Legacy USB IP to a Low Power USB IP
Verification IP Jun 28, 2017 Anand Paralkar, Pervez Bharucha - Silicon Interfaces Article
Understanding the UPF Power Domain and Domain Boundary
Low Power Jun 28, 2017 Progyna Khondkar Article
Automation and Reuse in RISC-V Verification Flow
UVM - Universal Verification Methodology Jun 28, 2017 Marcela Zachariasova, Lubos Moravec - Codasip, Ltd. Article
Emulation - A Job Management Strategy to Maximize Use
Acceleration Jun 28, 2017 Vijay Chobisa Article
RTL CDC is No Longer Enough: How Gate-Level CDC is Now Essential to First Pass Success
Clock-Domain Crossing Jun 28, 2017 Joe Hupcey Article
Formal Verification: Not Just for Control Paths
Formal Verification Jun 28, 2017 Rusty Stuber - Siemens Eda Article

April 2017

Sometimes the Life of a College Student and a Verification Engineer Aren’t All That Different
Simulation Apr 10, 2017 Verification Horizons Article

March 2017

Will Safety Critical Design Practices Improve First Silicon Success?
Functional Safety Mar 10, 2017 Harry Foster Article
UVM Tips and Tricks
Standards Mar 07, 2017 Verification Horizons Article

February 2017

Artifacts of Custom Checkers in Questa Power Aware Dynamic Simulation
Low Power Feb 28, 2017 Progyna Khondkar Article
Complementing Functional Verification Through the Use of Available Timing Information
Clock-Domain Crossing Feb 28, 2017 Rick Eram, Excellicon Article
Automating Tests with Portable Stimulus from IP to SoC Level
Standards Feb 28, 2017 Matthew Ballance Article

December 2016

Best Practices for FPGA and ASIC Development
Simulation Dec 21, 2016 Verification Horizons Article

November 2016

INs and OUTs of CAN Verification—A Comprehensive UVM-based Solution
Standards Nov 10, 2016 Verification Horizons Article
USB Type-C Verification: Challenges and Solution
Simulation Nov 10, 2016 Verification Horizons Article
How to Get the Maximum Out of Your Assertion and Coverage Based Verification Methodology
Standards Nov 10, 2016 Verification Horizons Article
24x7 Productivity: Veloce® Enterprise Server App Does the Job
Acceleration Nov 07, 2016 Vijay Chobisa Article
Power Aware Libraries: Standardization and Requirements for Questa Power Aware
Low Power Nov 07, 2016 Progyna Khondkar Article
Improving Performance and Verification of a System Through an Intelligent Testbench
Simulation Nov 07, 2016 Umesh Patel, Dhaval Shah - Arastu Systems Pvt. Ltd. Article

September 2016

Virtualization Delivers Total Verification of SoC Hardware, Software, and Interfaces
Simulation Sep 26, 2016 Verification Horizons Article

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Wednesday, May 21st-8:00 AM PDT

Solving the Semiconductor Verification Crisis: From Problem to Productivity

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Wednesday, May 28th-8:00 AM PDT

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