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June 2017 - Volume 13 Issue 2 (2)

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June 2015

Mitigating X Effects in Your Verification
Formal Verification Jun 05, 2015 Mark Eslinger Session
Questa X-Check: Finding X-Corruption
Formal Verification Jun 05, 2015 Mark Eslinger Demo

May 2015

New School Coverage Closure
Formal Verification May 29, 2015 Mark Eslinger Webinar
UVMC 2.3.1 Library
UVMC May 15, 2015 html
Technical Paper - SVA Local Variable Coding Guidelines for Efficient Use
Standards May 15, 2015 pdf
Questa Simulation - Power Aware
Low Power May 12, 2015 Chuck Seeley Demo
FPGA Trends in Functional Verification - 2014
Planning, Measurement and Analysis May 08, 2015 Harry Foster Session
ASIC/IC Trends in Functional Verification - 2014
Planning, Measurement and Analysis May 08, 2015 Harry Foster Session

March 2015

UVM Rapid Adoption: A Practical Subset of UVM
UVM - Universal Verification Methodology Mar 31, 2015 Tom Fitzpatrick pdf
UVM Rapid Adoption: A Practical Subset of UVM
UVM - Universal Verification Methodology Mar 31, 2015 Tom Fitzpatrick pdf
UVM Rapid Adoption: A Practical Subset of UVM
UVM - Universal Verification Methodology Mar 31, 2015 Tom Fitzpatrick Webinar
UVMC 2.3.0 Library
UVMC Mar 15, 2015 html
Does Design Size Influence First Silicon Success?
Planning, Measurement and Analysis Mar 11, 2015 Harry Foster Article
Successive Refinement: A Methodology for Incremental Specification of Power Intent
Low Power Mar 11, 2015 Adnan Khan, John Biggs & Eamonn Quigley - Arm Article
Power Aware RTL Verification of USB 3.0 IPs
Low Power Mar 11, 2015 Gayathri Sn, Badrinath Ramachandra - L&T Technology Services Limited Article
Increase Verification Productivity with Questa® UVM Debug
Standards Mar 11, 2015 Verification Horizons Article
Fast Track to Productivity Using Questa® Verification IP
Simulation Mar 11, 2015 Verification Horizons Article
MIPI LLI Verification using Questa Verification IP
Verification IP Mar 11, 2015 Verification Horizons Article
Merging SystemVerilog Covergroups by Example
Standards Mar 11, 2015 Verification Horizons Article
Small, Maintainable Tests
UVM - Universal Verification Methodology Mar 11, 2015 Ashley Winn - Sondrel Ic Design Services Article
UVM Connect 2.3.0 Kit
UVMC Mar 10, 2015 John Stickley tar
UVM Connect 2.3.0 Primer
UVMC Mar 10, 2015 John Stickley pdf

February 2015

UVM Connect 2.3 Kit
UVMC Feb 18, 2015 John Stickley tar

January 2015

Coverage Cookbook - Japanese Release
Coverage Jan 14, 2015 pdf

December 2014

Dealing With UVM and OVM Sequences
Standards Dec 29, 2014 Verification Horizons Article

FPU Webinar

Wednesday, Feb 05th-8:00 AM PST

Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Functional Safety Webinar

Wednesday, Jan 29th-8:00 AM PST

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

Regression Webinar

Wednesday, Feb 12th-8:00 AM PST

Smart Regression: Optimize Regression Efficiency Using Questa Verification IQ Regression Navigator

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

Simulation Webinar

Unlocking the Power of QuestaSim and Visualizer Integration

VA Live: El Segundo

Thursday, Feb 06th-9:30 AM PST

Formal Security Verification, AI/ML, RTL Simulation, and more

Safety & Security Webinar

Wednesday, Feb 19th-8:00 AM PST

FPGA Equivalence Checking from RTL to the Bitstream

Formal Security Webinar

Explore How to Protect Against Data Corruption with Formal Security Verification

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

VA Live: Silicon Valley

Thursday, Jan 30th-9:30 AM PST

Verification IP for UCIe, PCIe Gen 7, HBM4, and more

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