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December 2019

Why Hardware Emulation Is Necessary to Verify Deep Learning Designs
Acceleration Dec 03, 2019 Jean-Marie Brunet Article
Deadlock Prevention Made Easy with Formal Verification
Formal Verification Dec 03, 2019 Dr. Jeremy Levitt Article
Exercising State Machines with Command Sequences
Standards Dec 03, 2019 Matthew Ballance Article
Designing A Portable Stimulus Reuse Strategy
Standards Dec 03, 2019 Matthew Ballance Article
Don’t Forget the Protocol! A CDC Protocol Methodology to Avoid Bugs in Silicon
Clock-Domain Crossing Dec 03, 2019 Kurt Takara Article
Is Your Verification in Jeopardy?
Simulation Dec 02, 2019 Tom Fitzpatrick Article

November 2019

UVMC 2.3.2 Library
UVMC Nov 15, 2019 html
UVM Connect 2.3.2 Kit
UVMC Nov 14, 2019 John Stickley tar
UVM Connect 2.3.2 Primer
UVMC Nov 14, 2019 John Stickley pdf
UVM Connect 2.3.2 Primer
UVMC Nov 14, 2019 John Stickley pdf
UVM Connect 2.3.2 HTML
UVMC Nov 14, 2019 John Stickley tar
UVM Connect 2.3.2 Primer
UVMC Nov 14, 2019 John Stickley pdf

October 2019

Formal Property Checking
Formal Verification Oct 14, 2019 Joe Hupcey Track
Questa PropCheck GUI - Overview
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Cone of Influence
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Debug a Firing
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Properties Tab
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Property Editor
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Run Monitor/Details
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Schematic
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Source Window
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Waveform View
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Questa PropCheck GUI - Run Formal
Formal Verification Oct 10, 2019 Mark Eslinger Demo
Why Reset Domain Crossing Verification is an Emerging Requirement
Questa Design Solutions Oct 01, 2019 Kurt Takara Webinar
Why Reset Domain Crossing Verification is an Emerging Requirement
Questa Design Solutions Oct 01, 2019 Kurt Takara pdf

FPU Webinar

Wednesday, Feb 05th-8:00 AM PST

Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Functional Safety Webinar

Wednesday, Jan 29th-8:00 AM PST

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

VA Live: Silicon Valley

Thursday, Jan 30th-9:30 AM PST

Verification IP for UCIe, PCIe Gen 7, HBM4, and more

Simulation Webinar

Wednesday, Jan 15th-8:00 AM PST

Unlocking the Power of QuestaSim and Visualizer Integration

Formal Security Webinar

Wednesday, Jan 22nd-8:00 AM PST

Explore How to Protect Against Data Corruption with Formal Security Verification

Browse all content in Siemens Verification Academy with the tag sata

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