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June 2013

NoC Generic Scoreboard VIP
Verification IP Jun 01, 2013 François Cerisier, Mathieu Maisonneuve - Tvs Article
Flexible UVM Components: Configuring Bus Functional Models
UVM - Universal Verification Methodology Jun 01, 2013 Gunther Clasen - Ensilica Article
Monitors, Monitors Everywhere – Who Is Monitoring the Monitors
UVM - Universal Verification Methodology Jun 01, 2013 Rich Edelman Article
The Need for Speed: Understanding Design Factors that Make Multi-core Parallel Simulations Efficient
Simulation Jun 01, 2013 Shobana Sudhakar Article

February 2013

Using Formal Analysis to Block and Tackle
Formal Verification Feb 25, 2013 Paul B. Egan - Rockwell Automation Article
Bringing Verification and Validation under One Umbrella
Acceleration Feb 25, 2013 Hans Van Der Schoot Article
System Level Code Coverage using Vista Architect and SystemC
Coverage Feb 25, 2013 Ken P. Mccarty - Siemens Eda Article
The Evolution of UPF: What’s Next?
Low Power Feb 25, 2013 Erich Marschner Article
Top Five Reasons Why Every DV Engineer Will Love the Latest SystemVerilog 2012 Features
SystemVerilog Feb 25, 2013 Ajeetha Kumari, Srinivasan Venkataramanan - Cvc Pvt. Ltd. Article
SVA in a UVM Class-based Environment
SystemVerilog Feb 25, 2013 Ben Cohen Article
The Formal Verification of Design Constraints
Formal Verification Feb 25, 2013 Ajay Daga - Fishtail Design Automation Article
OVM to UVM Migration, or There and Back Again: A Consultant’s Tale
UVM - Universal Verification Methodology Feb 25, 2013 Mark Litterick - Verilab Gmbh Article
Verification Horizons - Volume 9, Issue 1
Standards Feb 01, 2013 Tom Fitzpatrick pdf

October 2012

ST-Ericsson Speeds Time to Functional Verification Closure with Questa
Verification IQ Oct 01, 2012 Rachida El Idrissi - St-Ericsson Article
The Top Five Formal Verification Applications
Formal Verification Oct 01, 2012 Roger Sabbagh - Siemens Eda Article
Three Steps to Unified SoC Design and Verification
UVMC Oct 01, 2012 Mark Peryer Article
Evolution of UPF: Getting Better All the Time
Low Power Oct 01, 2012 Erich Marschner Article
Improving Analog/Mixed-Signal Verification Productivity
Analog Mixed-Signal Oct 01, 2012 Ahmed Eisawy Article
VHDL-2008: Why It Matters
VHDL 2008 Oct 01, 2012 Jim Lewis Article
Verification Horizons - Volume 8, Issue 3
Standards Oct 01, 2012 Tom Fitzpatrick pdf

June 2012

Siemens EDA has Accellera's Latest Standard Covered
Coverage Jun 15, 2012 Darron May Article
Is Intelligent Testbench Automation For You?
Portable Stimulus Jun 15, 2012 Mark Olen Article
Automated Generation of Functional Coverage Metrics for Input Stimulus
Portable Stimulus Jun 15, 2012 Mike Andrews - Siemens Eda Article
Targeting Internal-State Scenarios in an Uncertain World
Portable Stimulus Jun 15, 2012 Matthew Ballance Article
Virtualization Delivers Total Verification of SoC Hardware, Software, and Interfaces
Acceleration Jun 15, 2012 Jim Kenney - Siemens Eda Article

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DV Digest on YouTube

AI is Changing Verification | Interview with Abhi Kolpekwar

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