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March 2016 - Volume 12 Issue 1 (5)

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December 2017 - Volume 13 Issue 3 (3)

Design Constraints (3)

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July 2022 - Volume 18 Issue 2 (3)

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March 2020 - Volume 16 Issue 1 (3)

March 2021 - Volume 17 Issue 1 (3)

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October 2012 - Volume 8 Issue 3 (3)

Parallel Simulation (3)

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UALink (3)

UVMC 2.3.3 (3)

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VA Live 2019 - Westford (3)

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December 2019 - Volume 15 Issue 3 (2)

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IEEE (2)

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ISA (2)

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June 2013 - Volume 9 Issue 2 (2)

June 2014 - Volume 10 Issue 2 (2)

LVS (2)

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March 2014 - Volume 10 Issue 1 (2)

March 2017 - Volume 13 Issue 1 (2)

March 2022 - Volume 18 Issue 1 (2)

Memory-Mapped Registers (2)

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October 2013 - Volume 9 Issue 3 (2)

OnChip (2)

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VA Live 2026 - Austin (2)

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Factory (1)

February 2013 - Volume 9 Issue 1 (1)

February 2019 - Volume 15 Issue 1 (1)

Fibre Channel (1)

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Flash (1)

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Integer (1)

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Japanese (1)

July 2020 - Volume 16 Issue 2 (1)

July 2023 - Volume 19 Issue 2 (1)

June 2012 - Volume 8 Issue 2 (1)

June 2016 - Volume 12 Issue 2 (1)

June 2017 - Volume 13 Issue 2 (1)

June 2018 - Volume 14 Issue 2 (1)

June 2019 - Volume 15 Issue 2 (1)

LSTM (1)

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March 2018 - Volume 14 Issue 1 (1)

March 2023 - Volume 19 Issue 1 (1)

Marvell (1)

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Non-Trivial Bug Escapes (1)

November 2015 - Volume 11 Issue 3 (1)

November 2016 - Volume 12 Issue 3 (1)

November 2018 - Volume 14 Issue 3 (1)

November 2020 - Volume 16 Issue 3 (1)

Observer (1)

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Windows (1)

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XML (1)

YAML (1)

eFuse (1)

Show Less

March 2023

Continuous Integration (CI) driving efficient program execution
Questa Design Solutions Mar 28, 2023 Kevin Campbell pdf
Rapid Testbench Development
UVM Framework Mar 07, 2023 Bob Oden pdf

February 2023

A Formal-based Approach for Efficient RISC-V Processor Verification
Formal Verification Feb 24, 2023 Laurent Arditi, Paul Sargent, Thomas Aird, Lauranne Choquin - Codasip Article
Big Data for Verification – Inspiration from Large Language Models
Machine Learning Feb 24, 2023 Dan Yu link

January 2023

Verification Data Analytics with Machine Learning
Machine Learning Jan 25, 2023 Dan Yu Paper
Verification Data Analytics with Machine Learning
Machine Learning Jan 25, 2023 Dan Yu pdf
Intelligent Requirements Traceability for ISO 26262
Functional Safety Jan 18, 2023 Jake Wiltgen Paper
Intelligent Requirements Traceability for ISO 26262
Functional Safety Jan 18, 2023 Jake Wiltgen pdf

December 2022

The State of Functional Verification: Crisis or Opportunity?
Formal Verification Dec 08, 2022 Harry Foster pdf
The State of Functional Verification: Crisis or Opportunity?
Formal Verification Dec 08, 2022 Harry Foster mp4
EC-FPGA Updates with an Introduction to Instance Mapping
Formal Verification Dec 08, 2022 Kevin Urish pdf
EC-FPGA Updates with an Introduction to Instance Mapping
Formal Verification Dec 08, 2022 Kevin Urish mp4
UPEC: Side Channel Detection with Formal Verification
Formal Verification Dec 08, 2022 Keerthi Devraj mp4
UPEC: Side Channel Detection with Formal Verification
Formal Verification Dec 08, 2022 Keerthi Devraj pdf
A Novel Approach to Formal FW/HW Co-verification
Formal Verification Dec 08, 2022 Djones Lettnin mp4
A Novel Approach to Formal FW/HW Co-verification
Formal Verification Dec 08, 2022 Djones Lettnin pdf
Crossing the RISC-V Customization Barrier with Formal
Formal Verification Dec 08, 2022 Pascal Gouedo pdf
Crossing the RISC-V Customization Barrier with Formal
Formal Verification Dec 08, 2022 Pascal Gouedo mp4
Accelerator Quick Error Detection: Verification of Hardware Accelerators
Formal Verification Dec 08, 2022 Saranyu Chattopadhyay pdf
Accelerator Quick Error Detection: Verification of Hardware Accelerators
Formal Verification Dec 08, 2022 Saranyu Chattopadhyay mp4
How Formal Lights Up Your RISC-V Verification Avenue
Formal Verification Dec 08, 2022 Philippe Luc - Codasip pdf
How Formal Lights Up Your RISC-V Verification Avenue
Formal Verification Dec 08, 2022 Philippe Luc - Codasip mp4
Formal Coverage: An Approach to Analyze Property Holes
Formal Verification Dec 08, 2022 Aishwarya Sridhar mp4
Formal Coverage: An Approach to Analyze Property Holes
Formal Verification Dec 08, 2022 Aishwarya Sridhar pdf
The X-factors of X-checking
Formal Verification Dec 08, 2022 Kanthi Palaniappan pdf

Verification IP Webinar

Wednesday, May 20th-8:00 AM PDT

Breaking Bandwidth Barriers in the AI Era: Scaling PCIe with Retimers and Optical Innovation

VA Live BRNO - Czech Republic

Thursday, May 21st | 9:00 AM - 3:15 PM CEST

The seminar will highlight recent advances in Questa One and the growing role of AI in verification workflows.

Security Verification Webinar

Wednesday, Jun 03rd-8:00 AM PDT

AI for Early SoC Security Verification

VA Live - Hudson, MA

Tuesday, June 9, 2026 | 9:00 AM - 5:00 PM EDT

This seminar empowers design engineers and verification teams with knowledge and tools for advanced AI automation and intelligent verification.

BUGGED OUT Podcast

Episode #4: Harry Foster talks with Vladislav Palfy about coverage closure.

DVCon Keynote

Beyond Bigger Designs: Rethinking Verification for the Era of Convergence

DVCon Workshop

Agentic AI for RTL Signoff: Gen AI for Chip Design Flows using Questa Toolkit

New White Papers

Agentic AI, Avery VIP, Coverage, Formal Verification, Functional Safety, UPF and More!

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