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March 2017 - Volume 13 Issue 1 (3)

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December 2019 - Volume 15 Issue 3 (2)

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March 2016

Slaying the UVM Reuse Dragon: Issues and Strategies for Achieving UVM Reuse
UVM Framework Mar 01, 2016 Bob Oden Paper
Slaying the UVM Reuse Dragon: Issues and Strategies for Achieving UVM Reuse
UVM Framework Mar 01, 2016 Bob Oden pdf
Slaying the UVM Reuse Dragon: Issues and Strategies for Achieving UVM Reuse
UVM Framework Mar 01, 2016 Bob Oden pdf

February 2016

The Downside of Advanced Verification
SystemVerilog Feb 22, 2016 Neil Johnson Session
Introduction to SVUnit
SystemVerilog Feb 22, 2016 Neil Johnson Session
Your First Unit Test!
SystemVerilog Feb 22, 2016 Neil Johnson Session
Unit Testing UVM Components
SystemVerilog Feb 22, 2016 Neil Johnson Session
SVUnit Case Studies & Summary
SystemVerilog Feb 22, 2016 Neil Johnson Session
Verification with Multi-core Parallel Simulations: Have You Found Your Sweet Spot Yet?
Simulation Feb 21, 2016 Rohit Jain pdf
Verification with Multi-core Parallel Simulations: Have You Found Your Sweet Spot Yet?
Simulation Feb 21, 2016 Rohit Jain pdf
Forbidden Sequence Property
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf
Resource Sharing
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf
BFM Notification
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf
Environment Layering
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf
Component Configuration
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf
Dual Domain Hierarchy Pattern
Planning, Measurement and Analysis Feb 12, 2016 Harry Foster pdf

January 2016

Verification Patterns - Taking Reuse to the Next Level
Planning, Measurement and Analysis Jan 22, 2016 Harry Foster pdf

December 2015

Precedence Chain Property
Planning, Measurement and Analysis Dec 22, 2015 Harry Foster pdf
Response Chain Property
Planning, Measurement and Analysis Dec 22, 2015 Harry Foster pdf
Response Property
Planning, Measurement and Analysis Dec 21, 2015 Harry Foster pdf
Precedence Property
Planning, Measurement and Analysis Dec 21, 2015 Harry Foster pdf
Universality Property
Planning, Measurement and Analysis Dec 21, 2015 Harry Foster pdf
Bounded Existence Property
Planning, Measurement and Analysis Dec 21, 2015 Harry Foster pdf
Existence Property
Planning, Measurement and Analysis Dec 21, 2015 Harry Foster pdf
Absence Property
Planning, Measurement and Analysis Dec 18, 2015 Harry Foster pdf

Verification IP Webinar

Wednesday, May 20th-8:00 AM PDT

Breaking Bandwidth Barriers in the AI Era: Scaling PCIe with Retimers and Optical Innovation

VA Live BRNO - Czech Republic

Thursday, May 21st | 9:00 AM - 3:15 PM CEST

The seminar will highlight recent advances in Questa One and the growing role of AI in verification workflows.

Security Verification Webinar

Wednesday, Jun 03rd-8:00 AM PDT

AI for Early SoC Security Verification

BUGGED OUT Podcast

Episode #4: Harry Foster talks with Vladislav Palfy about coverage closure.

DVCon Keynote

Beyond Bigger Designs: Rethinking Verification for the Era of Convergence

DVCon Workshop

Agentic AI for RTL Signoff: Gen AI for Chip Design Flows using Questa Toolkit

New White Papers

Agentic AI, Avery VIP, Coverage, Formal Verification, Functional Safety, UPF and More!

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