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September 2021 - Volume 17 Issue 2 (7)

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Show Less

November 2016

Questa Verification IP PCIe®
Verification IP Nov 14, 2016 Akshay Sarup Webinar
Questa Verification IP AMBA
Verification IP Nov 14, 2016 Raghu Ardeishar Webinar
Power Aware Libraries: Standardization and Requirements for Questa® Power Aware
Simulation Nov 14, 2016 Verification Horizons Article
Industry Trends in Today’s Functional Verification Landscape
Planning, Measurement and Analysis Nov 11, 2016 Harry Foster Webinar
Enterprise Debug for Formal
Formal Verification Nov 11, 2016 Joe Hupcey Webinar
Enterprise Debug for Simulation
Debug Nov 11, 2016 Moses Satyasekaran Webinar
24 x 7 Productivity: Veloce® Enterprise Server App Does the Job
Simulation Nov 10, 2016 Verification Horizons Article
INs and OUTs of CAN Verification—A Comprehensive UVM-based Solution
Standards Nov 10, 2016 Verification Horizons Article
USB Type-C Verification: Challenges and Solution
Simulation Nov 10, 2016 Verification Horizons Article
How to Get the Maximum Out of Your Assertion and Coverage Based Verification Methodology
Standards Nov 10, 2016 Verification Horizons Article

October 2016

Functional Verification Study - 2016
Planning, Measurement and Analysis Oct 14, 2016 Harry Foster Session

September 2016

Virtualization Delivers Total Verification of SoC Hardware, Software, and Interfaces
Simulation Sep 26, 2016 Verification Horizons Article

August 2016

Extending a Traditional VIP to Solve PHY Verification Challenges
Verification IP Aug 26, 2016 pdf
Beyond UVM Registers - Better, Faster, Smarter
UVM - Universal Verification Methodology Aug 25, 2016 Rich Edelman Paper
Beyond UVM Registers - Better, Faster, Smarter
UVM - Universal Verification Methodology Aug 25, 2016 Rich Edelman pdf
Total Recall - What to Look for in a Memory Model Library
Verification IP Aug 24, 2016 pdf
Three Steps to Unified SoC Design and Verification
Standards Aug 19, 2016 Mark Peryer Article
Staying Competitive with Advanced FPGA Verification
FPGA Verification Aug 10, 2016 Bryan Ramirez Webinar

June 2016

Trends in Functional Verification
Planning, Measurement and Analysis Jun 20, 2016 Harry Foster pdf
Debug Data API Update
Debug Jun 20, 2016 Rich Edelman pdf
Verification IP and Memory Models Improve Productivity and Reduce Risk
Verification IP Jun 20, 2016 Mark Olen pdf
Back to the Stone Ages for Advanced Verification
Planning, Measurement and Analysis Jun 20, 2016 Neil Johnson pdf
No RTL Yet? No Problem. UVM Testing a SystemVerilog Fabric Model
Standards Jun 15, 2016 Rich Edelman Article
How Formal Techniques Can Keep Hackers from Driving You into a Ditch
Formal Verification Jun 15, 2016 Joe Hupcey Article
Physical Verification of FPGAs in Accordance with an Aerospace DO254 Methodology Flow
Simulation Jun 14, 2016 Verification Horizons Article

Osmosis 2024

Thursday, October 17th | Holiday Inn City Centre | Munich, Germany

DVCon Europe 2024

October 15th -16th | Holiday Inn City Centre | Munich, Germany

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

VA Live Seminar

Wednesday, November 6th | TopGolf | Austin, Texas

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

Upcoming HBM4 Webinar

Wednesday, Oct 30th-9:00 AM PDT

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

Upcoming Questa Webinar

Wednesday, Nov 13th-8:00 AM PST

Simplify Scripting Environment using Qrun Capabilities in QuestaSim

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