Comprehensive PCIe Verification Solution for Bleeding Edge and Mission Critical SoC & IP Designs

In this session, you will learn design considerations for PCIe 5.0 and 6.0 design IP and how you can stay ahead in the market in verifying the most advanced and critical features of PCIe 6.0 and 5.0 for your design IPs.

AI/ML
Big Data
Design IP
High Speed
HPC
PCIe
PCIe Gen 6
PCI Express
Protocol
Verification IP
Avery Verification IP
Intermediate

Verification IP

Luis Rodriguez Jalaj Gupta

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