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On Demand Seminars

Sessions

New Low Power Verification Techniques

New Low Power Verification Techniques Session | Subject Matter Expert - Chuck Seeley | Verification Academy Live Seminar

This session highlights a “new school” low power methodology termed “successive refinement” that uses the strength of UPF in just such a structured approach.

Navigating the Perfect Storm: New School Verification Solutions

Navigating the Perfect Storm - New School Solutions Session | Subject Matter Expert - Tom Fitzpatrick | Verification Academy Live Seminar

You will learn today’s trends and challenges in SoC design and verification and outlines a path for navigating this “perfect storm."

New School Coverage Closure

New School Coverage Closure Session | Subject Matter Expert - Mark Eslinger | Verification Academy Live Seminar

You will learn a new school formal verification method which automates the job of focusing coverage closure efforts.

New School Connectivity Checking

New School Connectivity Checking Session | Subject Matter Expert - Mark Eslinger | Verification Academy Live Seminar

You will learn the use of a new school formal verification method which can be easily applied to solve the problem of connectivity checking

Old School vs New School Stimulus Generation Techniques

Old School vs New School Stimulus Generation Techniques  Session | Subject Matter Expert - Matthew Ballance | Verification Academy Live Seminar

You will learn the three dominant stimulus generation techniques used today for functional verification to identify the characteristics of stimulus generated by each technique.

New School Thinking for Fast and Efficient Verification Using EZ-VIP

New School Thinking for Fast and Efficient Verification Using EZ-VIP Session | Subject Matter Expert - Jason Polychronopoulos | Verification Academy Live Seminar

You will learn how to swiftly move through VIP instantiation, connection, configuration and protocol initialization so that you can rapidly achieve your verification objectives.

Verification and Debug: Old School Meets New School

Verification and Debug - Old School Meets New School Session | Subject Matter Expert - Rich Edelman | Verification Academy Live Seminar

You will learn how to use the best of old and new school debug techniques to find problems faster and to better answer “am I done yet”.

Full SoC Emulation from Device Drivers to Peripheral Interfaces

Full SoC Emulation from Device Drivers to Peripheral Interfaces  Session | Subject Matter Expert - Jim Kenney | Verification Academy Live Seminar

You will learn how an emulation-based, end-to-end flow yields a higher confidence at tape out and a faster time to market.

Establishing a Company Wide Verification Reuse Library

Establishing a Company wide Verification Reuse Library Session | Subject Matter Expert - Bob Oden | Verification Academy Live Seminar

You will learn how to outline key characteristics of a reuse verification library and will outline a proven reuse methodology that is available without license.

UVM Sequences in Depth

UVM Sequences in Depth Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar, we will walk through the mechanics of setting up and executing Slave Sequences in a responder.

UVM 1.2 is Coming, So Be Prepared

UVM 1.2 is Coming, So be Prepared Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will teach you everything you need to know about the future of UVM including new features, performance, backward-compatibility concerns and more.

UVM, The Next Phase

Subject Matter Expert - Albert Chiang | UVM - The Next Phase Session | Technical Seminars

Challenges faced by advanced UVM users include reusing IP level environment for SOC verification, register testing, UVM debug, and integration with VIP.

Mentor VIP, More than just a BFM

Mentor VIP, More than just a BFM Session | Subject Matter Expert - Tom Fitzpatrick | Verification Seminar

Today’s advanced UVM environments require more than a standard BFM to support environment reuse, randomized stimulus, generation of traffic scenarios, coverage collection, etc.

Abstract UVM Stimulus

Abstract UVM Stimulus Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will introduce you to abstract stimulus specification to provide more effective UVM tests that can be reused throughout your SoC flow.

Automate UVM Register Models

UVM Register Assistant Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will introduce the UVM Register Assistant showing how to generate correct-by-construction register models and tests from a register specification.

Advanced UVM Debug

Advanced UVM Debug Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will highlight some new strategies for debugging UVM-based testbenches.

Effectively Modeling and Analyzing Coverage

Beyond UVM: Effectively Modeling and Analyzing Coverage Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will outline a comprehensive coverage strategy that will help you implement effective functional coverage for your project.

OVM to UVM Migration

OVM to UVM Migration Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will introduce a step-by-step discussion of how to migrate your OVM code to UVM, including running the transition script.

UVM Connect

UVM Connect Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar introduces UVM Connect; providing TLM1 and TLM2 connectivity and object passing between SystemC and SystemVerilog UVM models and components.

Customization in UVM

Customization in UVM Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will review the configuration database feature of UVM and show you how to organize your testbench to maximize flexibility.

More UVM Registers

More UVM Registers Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will expand on the introductory session and will discuss how to implement registers and also review score-boarding at the register layer.

Introduction to UVM Registers

Introduction to UVM Registers Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will provide an introduction to the Register Layer and show you how to get started writing tests and sequences and checking results at the register layer.

Protocol Layering

Protocol Layering Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will show how to deconstruct sequence items and sequences across the protocol hierarchy and how to encapsulate each layer to preserve reuse.

UVM Debug

UVM Debug Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will show you how to maximize your ability debug your testbench so you can get on with the real task of verifying your design.

Introducing UVM Express

UVM Express Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will show you how to move from initial adoption with UVM Express to a full UVM-based environment.

Scoreboards and Results Predictors in UVM

Scoreboards and Results Predictors in UVM Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar will outline the proper architecture of scoreboards and predictors in UVM and how they relate to coverage.

C-Based Stimulus for UVM

C-Based Stimulus for UVM Session | Subject Matter Expert - Tom Fitzpatrick | UVM Recipe of the Month Seminar

This Verification Cookbook seminar describes a technique in which C stimulus can be applied to the DUT via an existing UVM testbench that contains one or more bus agents.