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Functional Verification: Badging and Certification
Resource (Learning Center) - Jan 01, 2023 by Siemens Learning Center
Test your skills and knowledge, improve productivity and advance your career. Pass any exam and receive a verifiable badge and certificate. To access this library for free, enter promotional code CERTNOW in the shopping cart.
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Part 10: IC/ASIC Language and Library Adoption Trends
Resource (Verification Horizons Blog) - Dec 26, 2022 by Harry Foster
In this blog I plan to discuss various IC/ASIC language and library adoption trends. Figure 10-1 shows the aggregated adoption trends for languages used to create RTL designs across all market segments and all regions of the world. We see continual interest in SystemVerilog for RTL creation.
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Part 8: IC/ASIC Resource Trends
Resource (Verification Horizons Blog) - Dec 18, 2022 by Harry Foster
In this blog, I plan to discuss the growing IC/ASIC project resource trends resulting from growing design complexity. Figure 8-1 shows the percentage of total IC/ASIC project time spent in verification. You can see two extremes in this graph. In general, projects that spend very little time in verification are typically working on designs with a good deal of existing pre-verified design IP, which is integrated to create a new product.
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Part 9: ASIC Verification Technology Adoption Trends
Resource (Verification Horizons Blog) - Dec 18, 2022 by Harry Foster
The ASIC market in the mid-2000 timeframe underwent growing pains to address increased verification complexity, predominately brought on with the adoption of SoC-class designs. This maturing of ASIC projects’ processes is clearly visible when comparing various simulation-based verification technology adoption trends from 2007 through 2022 as shown in Figure 9-1, although the overall dynamic verification technique adoption trends have remained flat for the past few studies.
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Formal Verification of Security Properties
Resource (Recording) - Dec 08, 2022 by Ratish Punnoose - Sandia National Laboratories
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Formal Verification of Security Properties
Resource (Slides) - Dec 08, 2022 by Ratish Punnoose - Sandia National Laboratories
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Harry Foster - Siemens EDA
Resource (Interview) - Dec 08, 2022 by Harry Foster
Interview with Harry Foster of Siemens EDA about the surprising results from the 2022 Wilson Research Study and Osmosis' presentations.
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Holger Busch - Infineon
Resource (Interview) - Dec 08, 2022 by Holger Busch - Infineon
Interview with Holger Busch of Infineon about the origins of formal and how the presentations at Osmosis show how far formal verification has come.
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Katharina Ceesay-Seitz - ETH Zurich
Resource (Interview) - Dec 08, 2022 by Katharina Ceesay-Seitz
Interview with Katharina Ceesay-Seitz of ETH Zurich about the value of attending Osmosis.
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Philippe Luc - Codasip
Resource (Interview) - Dec 08, 2022 by Philippe Luc - Codasip
Interview with Philippe Luc of Codasip about his presentation on How formal lights up your RISC-V verification avenue .
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Saranyu Chattopadhyay - Stanford University
Resource (Interview) - Dec 08, 2022 by Saranyu Chattopadhyay
Interview with Saranyu Chattopadhyay of Stanford University about his presentation on Accelerator quick error detection: Verification of hardware accelerators .
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The State of Functional Verification: Crisis or Opportunity?
Resource (Slides) - Dec 08, 2022 by Harry Foster
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The State of Functional Verification: Crisis or Opportunity?
Resource (Recording) - Dec 08, 2022 by Harry Foster
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EC-FPGA Updates with an Introduction to Instance Mapping
Resource (Slides) - Dec 08, 2022 by Kevin Urish
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EC-FPGA Updates with an Introduction to Instance Mapping
Resource (Recording) - Dec 08, 2022 by Kevin Urish
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UPEC: Side Channel Detection with Formal Verification
Resource (Recording) - Dec 08, 2022 by Keerthi Devraj
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UPEC: Side Channel Detection with Formal Verification
Resource (Slides) - Dec 08, 2022 by Keerthi Devraj
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A Novel Approach to Formal FW/HW Co-verification
Resource (Recording) - Dec 08, 2022 by Djones Lettnin
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A Novel Approach to Formal FW/HW Co-verification
Resource (Slides) - Dec 08, 2022 by Djones Lettnin
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Crossing the RISC-V Customization Barrier with Formal
Resource (Slides) - Dec 08, 2022 by Pascal Gouedo
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Crossing the RISC-V Customization Barrier with Formal
Resource (Recording) - Dec 08, 2022 by Pascal Gouedo
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Accelerator Quick Error Detection: Verification of Hardware Accelerators
Resource (Slides) - Dec 08, 2022 by Saranyu Chattopadhyay
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Accelerator Quick Error Detection: Verification of Hardware Accelerators
Resource (Recording) - Dec 08, 2022 by Saranyu Chattopadhyay
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How Formal Lights Up Your RISC-V Verification Avenue
Resource (Slides) - Dec 08, 2022 by Philippe Luc - Codasip
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How Formal Lights Up Your RISC-V Verification Avenue
Resource (Recording) - Dec 08, 2022 by Philippe Luc - Codasip