Browse all content in Verification Academy: Articles, Cookbooks, Resources, Sessions, and Tracks

Search Results - 188 results

Filters

Content Type

Resource (188)

Audience

Beginner (154)

Intermediate (34)

Resource Type

Verification Horizons Blog (188)

Tags

Functional Verification Study (78)

IC/ASIC (78)

Industry Trends (78)

Trends (78)

Verification Trends (78)

WRG (78)

Emerging Trends (77)

Wilson Research Group (77)

Design Trends (76)

FPGA Verification (52)

Adoption Trends (48)

Functional Safety (37)

FPGA Designs (31)

Testbench (25)

Project Time (22)

Assertions (19)

Safety Critical (19)

Formal Verification (18)

2020 Study (16)

AI/ML (16)

2014 Study (15)

2016 Study (15)

2018 Study (15)

2022 Study (15)

Design Complexity (15)

Non-Trivial Bug Escapes (15)

Avery Verification IP (14)

SystemVerilog (14)

Protocol (13)

Asynchronous Clock (12)

DVCon (12)

FPGA Prototyping (12)

RDC (11)

Verification Effort (11)

COCOTB (10)

Embedded Processor Cores (10)

Generative AI (10)

Low Power (10)

Python (10)

UVM (10)

Agentic AI (9)

Artificial Intelligence (9)

Emulation (9)

ISO 26262 (9)

PYUVM (9)

Python for Verification Series (9)

Root Cause (9)

Static & Formal Adoption (9)

Verification Productivity (9)

Chiplets (8)

Compliance (8)

FPGA (8)

Machine Learning (8)

Questa One (8)

Re-spins (8)

Debug (7)

First-Silicon Success (7)

Lifecycle (7)

Methodology (7)

Simulation (7)

UCIe (7)

Accellera (6)

DFT (6)

Object Oriented Programming (6)

Power Intent (6)

Reset Issues (6)

Reset-Domain Crossing (6)

Verification Effectiveness (6)

CDC (5)

Coverage (5)

DAC (5)

Design Completion (5)

Formal Analysis (5)

Multi-Die (5)

Objects (5)

PCIe (5)

Power Management (5)

RTL (5)

Safety Metrics (5)

Security Verification (5)

Standards (5)

Universal Chiplet Interconnect Express (5)

Verification Maturity (5)

Waveform (5)

Automotive (4)

Bias (4)

Classes (4)

Computational Storage (4)

DFT Verification (4)

Factory (4)

IEEE (4)

Interoperability (4)

Metastability (4)

PCI Express (4)

Productivity Gap (4)

RDC Analysis (4)

RDC Violations (4)

Requirements (4)

UVM Debug (4)

Aerospace (3)

Analysis (3)

Automation (3)

Bug Detection (3)

Constraints (3)

Convergence (3)

Coverage Closure (3)

Data-driven Verification (3)

Driver (3)

HBM (3)

HPC (3)

In-System Test (3)

Interfaces (3)

LLMs (3)

Memory (3)

Mil/Aero (3)

Modeling (3)

NVMe (3)

PSS (3)

Polymorphism (3)

Reset Architecture (3)

Respins (3)

Routines (3)

Scenario Generation (3)

Traceability (3)

UALink (3)

UCIe 2.0 (3)

Variable (3)

Verification Practice (3)

3DIC (2)

ASIL (2)

ATPG (2)

Abstraction (2)

Analog (2)

Artificial Neural Network (2)

Bounded Proof (2)

CXL (2)

Certification (2)

Co-Simulation (2)

Compute Subsystems (2)

Config_db (2)

Configuration Database (2)

Constrained Random Verification (2)

Controllability (2)

Controllers (2)

DFT Methodology (2)

DO-254 (2)

Data Encryption (2)

Design Assurance (2)

Design Integrity (2)

Design for Test (2)

Digital Twin (2)

Equivalence Checking (2)

FMEDA (2)

FPU (2)

FSM (2)

Fault Campaign (2)

Fault Grading (2)

Functional Coverage (2)

GOMACTech (2)

Governance (2)

HBM4 (2)

Hallucination (2)

Handles (2)

Hardware Designs (2)

Hardware Fault (2)

IC Reliability (2)

IEEE 1801 (2)

Intelligent Automation (2)

Interconnect (2)

Iterations (2)

JEDEC (2)

Large Language Models (2)

PCIe Gen 8 (2)

Parallel Simulation (2)

Portable Test & Stimulus (2)

Properties (2)

Protocol Layers (2)

Prototyping (2)

RISC-V (2)

Race Conditions (2)

Requirements Traceability (2)

Safety Analysis (2)

Safety Verification (2)

SoC (2)

State Machine (2)

State Transitions (2)

System Analysis (2)

System Level (2)

Testing Strategies (2)

Tests (2)

Tool Assessment (2)

UCIe 3.0 (2)

UPF (2)

UPF 4.0 (2)

Universal Approximation (2)

VHDL (2)

Verification Closure (2)

Verification Models (2)

Verification Planning (2)

Verilog (2)

Virtual Interface (2)

Virtual Method (2)

osmosis 2024 (2)

$display (1)

1.2 (1)

1800.2 (1)

2026 Study (1)

AI Algorithms (1)

AI Model (1)

AMS (1)

ASIC (1)

Adaptive (1)

Agentic AI Framework (1)

Agentic Workflow (1)

Algorithms (1)

Analysis Pattern (1)

Arrays (1)

Autonomous Systems (1)

BISR (1)

Backward Compatibility (1)

Barriers (1)

Behavioral Coverage (1)

Big Data (1)

Bind (1)

Bitstream (1)

Block Level (1)

Break on Change (1)

Bug Hunting (1)

Bus Functional Models (1)

C (1)

CDC Analysis (1)

CMA (1)

CSD (1)

Cache Coherency (1)

Callbacks (1)

Checklists (1)

Clock Cycle (1)

Clock-Domain Crossing (1)

Clocking (1)

Co-Verification (1)

Code Coverage (1)

Component Measurement and Authentication (1)

Components (1)

Constrained Random Stimulus (1)

Coroutines (1)

Coverage Analysis (1)

Coverage Metrics (1)

Coverage-Driven Verification (1)

Cross Coverage (1)

Cryptography (1)

DAC 2024 (1)

DDR (1)

DFT Sign-Off (1)

DUT-TB (1)

DVClub (1)

DVCon 2024 (1)

DVCon 2025 (1)

DVCon Europe (1)

Data Models (1)

Data Processing (1)

Data Transfer (1)

Data Types (1)

Deadlock (1)

Declarative Environment (1)

Design Constructs (1)

Design Flow (1)

Design Mitigation (1)

Design Optimization (1)

Design Scaling (1)

Directed Test (1)

ED-80 (1)

Elliptic Curve (1)

Environment Pattern (1)

Error Traces (1)

Exhaustive (1)

Expressions (1)

Fault Analysis (1)

Fault Detection (1)

Fault Injection (1)

Fault Model (1)

Fault Simulation (1)

Floating-Point Units (1)

Formal Methods (1)

Forum (1)

Functional Correctness (1)

Functional Verification (1)

GPU (1)

HDL (1)

HDM (1)

Hardening (1)

Hardware Acceleration (1)

Hierarchical Data Model (1)

High-Frequency Trading (1)

High-Level Synthesis (1)

IDE (1)

IEEE 1800-2023 (1)

IP Security (1)

IST (1)

ITC 2026 (1)

Implementation Model (1)

Implementation Pattern (1)

Interaction Complexity (1)

LPDDR (1)

LRM (1)

Lockstep (1)

Logic Cone (1)

Logic Faults (1)

Low Latency (1)

MBIST (1)

MBSE (1)

Manufacturing Test (1)

Mathematical Analysis (1)

Memory Debug (1)

Memory Usage (1)

Mitigation Architecture (1)

Mixed-Signal Design (1)

Mixed-Signal Verification (1)

Multi-Phase Clocks (1)

NRRs (1)

NVM Express (1)

Namespaces (1)

Netlist (1)

Non-Resettable Registers (1)

NonBlocking Assignment (1)

Objections (1)

Objectives (1)

Observer (1)

Occurrence Property Pattern (1)

Order Property Pattern (1)

Orthogonalization (1)

PCI-SIG (1)

PSL (1)

PSS 3.0 (1)

Parameter (1)

Partitioning (1)

Pattern Sign-Off (1)

Patterns (1)

Performance (1)

Pipelined (1)

Postsim (1)

Power Aware (1)

Pre-Silicon (1)

Priority Sideband Packets (1)

Procedural Statements (1)

Property Analysis (1)

QEMU (1)

RDC Design (1)

RDC Methodology (1)

RTL Sign-Off (1)

Radiation Mitigation (1)

Reconvergence (1)

Reference Model (1)

Regression (1)

Report (1)

Requirements Management (1)

Reset Environment (1)

Reset Handling (1)

Reset Tree (1)

Retention (1)

Retimers (1)

Reuse (1)

SLM (1)

SPDM (1)

SSD (1)

SV & UVM Skills (1)

Scalable Verification (1)

Scoreboard (1)

Secure Data Path (1)

Security Protocol and Data Model (1)

Sequence Item (1)

Sequencer (1)

Sequences (1)

Silicon Confidence (1)

Singleton (1)

Software Aware (1)

Specification Pattern (1)

Static Checks (1)

Static RDC (1)

Static Timing (1)

Stimulus (1)

Stimulus Generation (1)

Stimulus Pattern (1)

Strategy (1)

Stream (1)

Sub-system (1)

Synchronization (1)

System Scaling (1)

System Verification (1)

System Verifier (1)

SystemC (1)

TLM (1)

Technology Scaling (1)

Tessent Test Solutions (1)

Test Class (1)

Test Development (1)

Test Modes (1)

Test Verification (1)

Testplan (1)

Threads (1)

Time Cone (1)

Timing (1)

Timing Corners (1)

Tool Confidence Level (1)

Tool Detection (1)

Tool Impact (1)

Tool Qualification (1)

Toolkit (1)

Transactions (1)

Transport Delay (1)

Tunneling (1)

U2U (1)

UEC (1)

UVM Framework (1)

UVM-MS (1)

UVMF (1)

UVVM (1)

Unreachability (1)

VCMs (1)

VCPs (1)

VHDL-2019 (1)

Validation (1)

Verification Architecture (1)

Verification Capture Points (1)

Verification Environment (1)

Verification Flow (1)

Verification Framework (1)

Verification Process (1)

Verification Workflow (1)

Virtual Equivalence (1)

Webinar (1)

YAML (1)

Zero-Defect Goals (1)

Show Less

August 2015

Part 11: IC/ASIC Power Management Trends
Planning, Measurement and Analysis Aug 10, 2015 Harry Foster link

July 2015

Part 10: IC/ASIC Language and Library Adoption Trends
Planning, Measurement and Analysis Jul 27, 2015 Harry Foster link
Part 9: IC/ASIC Verification Technology Adoption Trends
Planning, Measurement and Analysis Jul 19, 2015 Harry Foster link
Part 8: IC/ASIC Resource Trends
Planning, Measurement and Analysis Jul 13, 2015 Harry Foster link
Part 7: IC/ASIC Design Trends
Planning, Measurement and Analysis Jul 08, 2015 Harry Foster link

June 2015

Part 6: FPGA Verification Language and Library Adoption Trends
Planning, Measurement and Analysis Jun 03, 2015 Harry Foster link

May 2015

Part 5: FPGA Verification Technology Adoption Trends
Planning, Measurement and Analysis May 11, 2015 Harry Foster link

April 2015

Part 4: FPGA Verification Effectiveness Trends
Planning, Measurement and Analysis Apr 21, 2015 Harry Foster link
Part 3: FPGA Verification Effort Trends (Continued)
Planning, Measurement and Analysis Apr 01, 2015 Harry Foster link

March 2015

Part 2: FPGA Verification Effort Trends
Planning, Measurement and Analysis Mar 11, 2015 Harry Foster link

February 2015

Part 1: FPGA Design Trends
Planning, Measurement and Analysis Feb 08, 2015 Harry Foster link

January 2015

Prologue: The 2014 Wilson Research Group Functional Verification Study
Planning, Measurement and Analysis Jan 21, 2015 Harry Foster link
Understanding and Minimizing Study Bias (2014 Study)
Planning, Measurement and Analysis Jan 21, 2015 Harry Foster link

WRG Webinar

Tuesday, Nov 10th-8:00 AM PST

Beyond the Numbers: What the 2026 Functional Verification Study Reveals

Live Seminar

Thursday, Nov 12th-8:30 AM PST

VA Live Scottsdale @ Top Golf | Save your seat for the latest in Agentic AI and Verification IP

New White Paper!

2026 Functional Verification Study: Executive Findings

New White Paper!

Five Signals from the 2026 Functional Verification Study

New White Paper!

AI in Functional Verification: What the 2026 Industry Data Reveals

New White Paper!

DFT's Expanding Role in Software-Driven Silicon: From Structural Test Closure to System-Assurance Evidence

Browse all content in Verification Academy: Articles, Cookbooks, Resources, Sessions, and Tracks

Search Results - 188 results

Filters

August 2015

Part 11: IC/ASIC Power Management Trends

July 2015

Part 10: IC/ASIC Language and Library Adoption Trends

Part 9: IC/ASIC Verification Technology Adoption Trends

Part 8: IC/ASIC Resource Trends

Part 7: IC/ASIC Design Trends

June 2015

Part 6: FPGA Verification Language and Library Adoption Trends

May 2015

Part 5: FPGA Verification Technology Adoption Trends

April 2015

Part 4: FPGA Verification Effectiveness Trends

Part 3: FPGA Verification Effort Trends (Continued)

March 2015

Part 2: FPGA Verification Effort Trends

February 2015

Part 1: FPGA Design Trends

January 2015

Prologue: The 2014 Wilson Research Group Functional Verification Study

Understanding and Minimizing Study Bias (2014 Study)