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September 2021 - Volume 17 Issue 2 (12)

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February 2013 - Volume 9 Issue 1 (8)

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June 2016 - Volume 12 Issue 2 (8)

March 2021 - Volume 17 Issue 1 (8)

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July 2020 - Volume 16 Issue 2 (7)

LLMs (7)

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March 2015 - Volume 11 Issue 1 (7)

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Migration (7)

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November 2014 - Volume 10 Issue 3 (7)

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VA Live 2023 - Huntsville (7)

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XML (7)

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December 2017 - Volume 13 Issue 3 (6)

December 2022 - Volume 18 Issue 3 (6)

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June 2019 - Volume 15 Issue 2 (6)

MARLUG 2023 (6)

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March 2014 - Volume 10 Issue 1 (6)

March 2017 - Volume 13 Issue 1 (6)

March 2020 - Volume 16 Issue 1 (6)

March 2024 - Volume 20 Issue 1 (6)

Metric Validation (6)

November 2016 - Volume 12 Issue 3 (6)

November 2020 - Volume 16 Issue 3 (6)

October 2012 - Volume 8 Issue 3 (6)

October 2013 - Volume 9 Issue 3 (6)

Open Source (6)

PCIe Gen 7 (6)

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Prototyping (6)

Random Faults (6)

Respins (6)

Slave (6)

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Transaction-Level (6)

UCIe 3.0 (6)

UVM Forum (6)

UVVM (6)

VA Live 2024 - El Segundo (6)

VA Live 2024 - San Diego (6)

VA Live 2025 - El Segundo (6)

VA Live 2025 - Hudson (6)

VA Live 2025 - Huntsville (6)

VHDL Testbench (6)

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Windows (6)

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YAML (6)

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AI Model (5)

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December 2019 - Volume 15 Issue 3 (5)

Defect Coverage (5)

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February 2019 - Volume 15 Issue 1 (5)

Formal Testbench (5)

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March 2018 - Volume 14 Issue 1 (5)

Memory Usage (5)

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VA Live 2019 - Westford (5)

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VA Live 2024 - Westford (5)

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November 2018 - Volume 14 Issue 3 (4)

Objectives (4)

PCIe Gen 6 (4)

Partitioning (4)

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Plusargs (4)

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UART (4)

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UPF 4.0 (4)

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VA Live 2023 - Austin (4)

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VA Live 2024 - Fremont (4)

VA Live 2025 - Scottsdale (4)

VA Live 2026 - Austin (4)

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$display (3)

1.2 (3)

AHB (3)

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JUnit (3)

July 2023 - Volume 19 Issue 2 (3)

Jump Statements (3)

LRM (3)

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Loggers (3)

MC2 (3)

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NRRs (3)

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UVM 1.1d (3)

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IEEE 754 (2)

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Intersect (2)

JTAG (2)

Jittering (2)

Last Mile Problem (2)

Latch-Based Designs (2)

Latches (2)

Leakage (2)

Liberty Syntax (2)

LockGrab (2)

Lockstep (2)

Logic Cone (2)

Logic Faults (2)

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December 2017

PA GLS: The Power Aware Gate-level Simulation
Low Power Dec 05, 2017 Progyna Khondkar Article
Reset Verification in SoC Designs
Reset-Domain Crossing Dec 05, 2017 Kurt Takara Article
Debugging Inconclusive Assertions and a Case Study
Formal Verification Dec 05, 2017 Jin Hou Article
Separating Test Intent from Design Details with Portable Stimulus
Portable Stimulus Dec 05, 2017 Matthew Ballance Article

November 2017

Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Rich Edelman Paper
Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Rich Edelman pdf
UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley pdf
UVM Connect 2.3.1 Primer
UVMC Nov 08, 2017 John Stickley tar
UVM Connect 2.3.1 Kit
UVMC Nov 07, 2017 John Stickley tar
An Introduction to DO-254 and Advanced Verification
Functional Safety Nov 02, 2017 Tom Fitzpatrick Webinar

October 2017

DO-254 for FPGAs
Functional Safety Oct 17, 2017 Alex Grove - Siemens Eda pdf
Coverage & Plan Driven Verification for FPGAs Session
Verification Management Oct 17, 2017 pdf
Regression Management and Dev Ops
Verification Management Oct 17, 2017 pdf
FPGA Verification Introduction
FPGA Verification Oct 17, 2017 pdf
Testbench Acceleration
Acceleration Oct 17, 2017 pdf
Advanced Verification for FPGAs
FPGA Verification Oct 17, 2017 Brian Mathewson pdf
Accelerating Coverage Closure
Coverage Oct 17, 2017 Mark Handover pdf
Measuring ISO 26262 Metrics of Analog Circuitry in ICs
Functional Safety Oct 10, 2017 Stephen Sunter - Siemens Eda pdf
Measuring ISO 26262 Metrics of Analog Circuitry in ICs
Functional Safety Oct 10, 2017 Stephen Sunter Paper
Handling Inconclusive Assertions in Formal Verification
Formal Verification Oct 10, 2017 Jin Hou Track
Editor Insight
Formal Verification Oct 10, 2017 Harry Foster Session
Easy Solutions
Formal Verification Oct 10, 2017 Jin Hou Session
Assertion Complexity Reduction
Formal Verification Oct 10, 2017 Jin Hou Session
Design Complexity Reduction
Formal Verification Oct 10, 2017 Jin Hou Session
Advanced Topics
Formal Verification Oct 10, 2017 Jin Hou Session