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The Verification Academy Solutions section delivers focused insights into key market segments and verification products that address today’s emerging challenges. Explore how advanced technologies and methodologies—spanning functional verification, safety, security, and more—are applied to solve real-world design problems. This curated content brings together best practices, expert perspectives, and proven tools to accelerate verification success.
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Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
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Coverage

Accelerating Functional Coverage with Questa One CX

Simulation

Tackling Emerging DFT Verification Challenges with Questa One

Debug

Faster Debug of Complex Testbenches using Visualizer

Win the Tick to Trade Race by Root Causing Bugs Faster with QuestaSim

Prevent Performance Problems with Prompt RTL Profiling

Accelerate Development Using Advanced Debugging Approaches

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Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Explore How to Protect Against Data Corruption with Formal Security Verification

Questa Formal Verification IP AMBA: Achieve Protocol Compliance in Designs

Functional Verification Workflow for Trusted and Assured Microelectronics

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Securing your FPGA Design from RTL through to the Bitstream

Improving FPGA Safety and Security Compliance: FPGA Equivalence Checking from RTL to the Bitstream

Bringing Model-based Systems Engineering to IC and FPGA Design

ModelSim to Questa - Productivity Features

Functional Safety

Enhancing Automotive Safety Verification Using Questa One Sim FX

Enhancing Defect Coverage in DFT

Safety Analysis for Automotive Chips Based on ISO 26262

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

Union of SoC Design & Functional Safety FlowUnion of SoC Design & Functional Safety Flow

Questa Design Solutions

Improving Designer Productivity and Enabling Faster RDC Verification Closure with Machine Learning

New Advanced Techniques for Reset Domain Crossing (RDC) Analysis

Continuous Integration (CI) Driving Efficient Program Execution

Questa Design Solutions as a Sleep Aid

Applying Machine Learning to Accelerate CDC Analysis

Formal and the Next Normal

Questa Lint vs Formal AutoCheck

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Introduction to SystemVerilog Assertions

Easy Test Writing with a Proxy-driven Testbench

Making Your DPI-C Interface a Fast River of Data

The Life of a SystemVerilog Variable

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Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity

PCIe Gen7 Verification with Siemens Avery Verification IP

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

The Future of Multi-Die System Verification with UCIe

Verification IQ

Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

Smart Debug: Accelerate Root Cause Analysis and Reduce Debug Turnaround Time with Questa Verification IQ Regression Navigator

Smart Regression: Optimize Regression Efficiency Using Questa Verification IQ Regression Navigator

Boost Your Verification Productivity with Questa Verification IQ

Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data

Verification Planning

Solving the Semiconductor Verification Crisis: From Problem to Productivity

Functional Verification Study - 2022

The Three Pillars of Intent-Focused Insight

Trends in Functional Verification

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April 2024

Win the Tick to Trade Race by Root Causing Bugs Faster with QuestaSim
Debug Apr 16, 2024 Rich Edelman Webinar

March 2024

Reduce Gate-level Simulation Bring-up Time with Semi-formal X Verification
Verification IP Mar 27, 2024 Rick Koster Webinar
New Advanced Techniques for Reset Domain Crossing (RDC) Analysis
Reset-Domain Crossing Mar 14, 2024 Atul Sharma Webinar

February 2024

Comprehensive CXL 3.0 Verification for High-Bandwidth and Low-Latency Connectivity
Verification IP Feb 21, 2024 Chris Browy Webinar
Functional Verification Workflow for Trusted and Assured Microelectronics
Formal Verification Feb 06, 2024 John Hallman Webinar

January 2024

Comprehensive PCIe Verification Solution for Bleeding Edge and Mission Critical SoC & IP Designs
Verification IP Jan 24, 2024 Luis Rodriguez Webinar

December 2023

Multi-Die System Verification with Siemens’s UCIe VIP
Verification IP Dec 07, 2023 Justin Bunnell Webinar

November 2023

Prevent Performance Problems with Prompt RTL Profiling
Debug Nov 09, 2023 Rich Edelman Webinar

September 2023

Exploring the Multifaceted Landscape of Formal Coverage
Formal Verification Sep 20, 2023 Nicolae Tusinschi Webinar

July 2023

Breaking the RISC-V Processor Customization Barrier with Formal Verification
Formal Verification Jul 19, 2023 Sven Beyer Webinar

May 2023

Efficient Interconnect Formal Verification for Complex, Large-scale Designs
Formal Verification May 17, 2023 Nicolae Tusinschi Webinar

April 2023

Delivering First Silicon Success for Your Next SoC or 3DIC
Verification IP Apr 25, 2023 Gordon Allan Webinar
Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data
Verification IQ Apr 11, 2023 Darron May Webinar

March 2023

Continuous Integration (CI) Driving Efficient Program Execution
Questa Design Solutions Mar 28, 2023 Kevin Campbell Webinar
How to Exhaustively Verify Register I/O Policies Without Exhausting Yourself
Formal Verification Mar 18, 2023 Joon Hong Webinar
Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
Questa Design Solutions Mar 16, 2023 Neil Johnson Webinar
Introduction to SystemVerilog Assertions
SystemVerilog Mar 15, 2023 Chris Crile Webinar

November 2022

Union of SoC Design & Functional Safety Flow
Functional Safety Nov 30, 2022 Vedant Garg Webinar
Functional Verification Study - 2022
Planning, Measurement and Analysis Nov 16, 2022 Harry Foster Webinar
Questa Design Solutions as a Sleep Aid
Questa Design Solutions Nov 02, 2022 Vinayak Desai Webinar

October 2022

CDC and RDC Assist: Applying Machine Learning to Accelerate CDC Analysis
Questa Design Solutions Oct 25, 2022 Atul Sharma Webinar
Formal and the Next Normal
Formal Verification Oct 19, 2022 Joe Hupcey Webinar

September 2022

Overcoming Today’s Verification, Supply Chain, and Legacy Technology Challenges Associated with FPGA-based Designs
Formal Verification Sep 30, 2022 Martin Rowe Webinar

June 2022

Questa Lint vs Formal AutoCheck
Questa Design Solutions Jun 15, 2022 Kevin Campbell Webinar
The Three Pillars of Intent-Focused Insight
Planning, Measurement and Analysis Jun 08, 2022 Harry Foster Webinar

26–50 of 221

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