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March 2016 - Volume 12 Issue 1 (5)

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March 2015 - Volume 11 Issue 1 (4)

March 2024 - Volume 20 Issue 1 (4)

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PCIe Gen 6 (4)

PSS (4)

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UPF 4.0 (4)

Unified Coverage Database (4)

VA Live 2023 - Austin (4)

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VA Live 2024 - Westford (4)

VA Live 2025 - Huntsville (4)

VA Live 2026 - El Segundo (4)

Verification Cycles (4)

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Cryptography (3)

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December 2017 - Volume 13 Issue 3 (3)

Design Constraints (3)

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Initial States (3)

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July 2022 - Volume 18 Issue 2 (3)

June 2015 - Volume 11 Issue 2 (3)

March 2020 - Volume 16 Issue 1 (3)

March 2021 - Volume 17 Issue 1 (3)

Mathematical Analysis (3)

Memory Models (3)

Model Context Protocol (3)

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Namespaces (3)

October 2012 - Volume 8 Issue 3 (3)

Parallel Simulation (3)

Power Architecture (3)

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Python (3)

QFL (3)

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System Level (3)

Tcl/Tk (3)

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Transfer Protocols (3)

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Trust Verification (3)

UALink (3)

UVMC 2.3.3 (3)

UVMC 2.3.4 (3)

VA Live 2019 - Westford (3)

VA Live 2024 - Austin (3)

VA Live 2024 - Fremont (3)

VRM (3)

Variable (3)

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2D/3D (2)

5G (2)

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C (2)

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Clocking (2)

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Config_db (2)

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DVCON 2021 (2)

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Data Link (2)

Dead Code (2)

December 2019 - Volume 15 Issue 3 (2)

December 2022 - Volume 18 Issue 3 (2)

Design Checking (2)

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Elements List (2)

Ethernet (2)

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GLS (2)

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GPU (2)

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Hallucination (2)

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Heterogeneous (2)

IEEE (2)

IEEE 754 (2)

IP-XACT (2)

ISA (2)

Illegal Bins (2)

Implementation Model (2)

Implicit/Explicit (2)

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Initial Checks (2)

Instance (2)

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Instantiate (2)

Intelligent Integration (2)

Interconnect Signals (2)

Jittering (2)

June 2013 - Volume 9 Issue 2 (2)

June 2014 - Volume 10 Issue 2 (2)

LVS (2)

Level-shifter (2)

Lockstep (2)

Loggers (2)

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Machine Readable Specification (2)

March 2014 - Volume 10 Issue 1 (2)

March 2017 - Volume 13 Issue 1 (2)

March 2022 - Volume 18 Issue 1 (2)

Memory-Mapped Registers (2)

Metastable (2)

Metric Validation (2)

Mixed-Signal Design (2)

Modules (2)

Monitor (2)

Multi-Language Environment (2)

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Objects (2)

October 2013 - Volume 9 Issue 3 (2)

OnChip (2)

Open Architecture (2)

PAM4 (2)

PCI-SIG (2)

PCIe Gen 7 (2)

PMHF (2)

Parameter (2)

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UPF 2.0 (2)

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USB (2)

UVMC 2.3.0 (2)

UVMC 2.3.1 (2)

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Ultra Accelerator Link (2)

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Unreachability (2)

VA Live 2026 - Austin (2)

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Verification Bottleneck (2)

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Wave Window (2)

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osmosis 2024 A&D (2)

$display (1)

2.5D (1)

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Component Measurement and Authentication (1)

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Controller Area Network (1)

Counterexample (1)

Cover Property (1)

Coverage Achievement (1)

Coverage Models (1)

D-PHY (1)

DVCon 2026 (1)

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Data Corruption (1)

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Design.bin (1)

Determinism (1)

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Development Lifecycle (1)

DisplayPort (1)

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Dual Domains (1)

Dynamic CDC (1)

ED-80 (1)

EMC (1)

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Elliptic Curve (1)

Embedded Analytics (1)

Embedded Software (1)

Emerging Trends (1)

Enterprise Debug and Analysis (1)

Equalization (1)

Execution Trace (1)

Factory (1)

February 2013 - Volume 9 Issue 1 (1)

February 2019 - Volume 15 Issue 1 (1)

Fibre Channel (1)

Finite State Machine (1)

Flash (1)

Formal Test Planning (1)

Four Retimer Aware (1)

Functional Monitoring (1)

Generation (1)

GitHub Copilot (1)

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HDMI (1)

HSI (1)

HYCON (1)

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IC/ASIC (1)

IEC 62304 (1)

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In-Circuit Emulation (1)

In-System Test (1)

Integer (1)

Integration Level (1)

Interrupts (1)

Japanese (1)

July 2020 - Volume 16 Issue 2 (1)

July 2023 - Volume 19 Issue 2 (1)

June 2012 - Volume 8 Issue 2 (1)

June 2016 - Volume 12 Issue 2 (1)

June 2017 - Volume 13 Issue 2 (1)

June 2018 - Volume 14 Issue 2 (1)

June 2019 - Volume 15 Issue 2 (1)

LSTM (1)

Lane Margining (1)

Layouts (1)

Logic Faults (1)

Low Latency (1)

MUX (1)

March 2018 - Volume 14 Issue 1 (1)

March 2023 - Volume 19 Issue 1 (1)

Marvell (1)

Mathworks (1)

Measurement (1)

Memory BIST (1)

Memory Debug (1)

Memory Leak (1)

Model Library (1)

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NAND (1)

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NRRs (1)

Non-Resettable Registers (1)

Non-Trivial Bug Escapes (1)

November 2015 - Volume 11 Issue 3 (1)

November 2016 - Volume 12 Issue 3 (1)

November 2018 - Volume 14 Issue 3 (1)

November 2020 - Volume 16 Issue 3 (1)

Observer (1)

Optical Retimer (1)

PCIe Gen 4 (1)

PCIe Gen 8 (1)

PHY (1)

Partitioned Compile (1)

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Phrase Configuration (1)

Portability (1)

Power Consumption (1)

Power Gating (1)

Pre-Silicon (1)

Productivity Gap (1)

Property Assist (1)

Property Editor (1)

Property Generation (1)

Prototyping (1)

QEMU (1)

QOS Processor (1)

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RAM (1)

RDC Methodology (1)

RDMA (1)

RISC-V Verification Interface (1)

RNG (1)

RTL Assist (1)

RTL Emulation (1)

RTL Security (1)

Receiver (1)

Recording (1)

Recurrent Neural Networks (1)

Release Notes (1)

Repair Architecture (1)

Reset Environment (1)

Reset Tree (1)

Respins (1)

Restore (1)

Retimer Verification (1)

Retimers (1)

Root Complex (1)

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SA-EDI (1)

SATA (1)

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SKP (1)

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SPI (1)

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Semantics (1)

Sequencer (1)

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Signal Processing Domain (1)

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Singleton (1)

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UVMC 2.1.4 (1)

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VA Live 2023 - El Segundo (1)

VA Live 2026 - Hudson (1)

VC File (1)

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Values (1)

VbyOne (1)

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Verbosity (1)

Verification Component (1)

Verification Evidence (1)

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Verification Run Manager (1)

Virtual Equivalence (1)

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WRG (1)

Wall-Clock Run-Time (1)

Watchlist (1)

Windows (1)

X-Optimism (1)

XML (1)

YAML (1)

eFuse (1)

Show Less

February 2016

Whose Fault is It? Advanced Techniques for Optimizing ISO 26262 Fault Analysis
Functional Safety Feb 28, 2016 Avidan Efody Paper
Whose Fault is It? Advanced Techniques for Optimizing ISO 26262 Fault Analysis
Functional Safety Feb 28, 2016 Avidan Efody pdf

November 2015

UVM Framework: Create a UVM Environment in Less than an Hour
UVM Framework Nov 25, 2015 Bob Oden Webinar
UVM Framework: Create a UVM Environment in Less than an Hour
UVM Framework Nov 25, 2015 Bob Oden pdf
Leveraging Verification IP (VIP) for Fast & Efficient Verification
Verification IP Nov 25, 2015 Jason Polychronopoulos pdf
Leveraging Verification IP (VIP) for Fast & Efficient Verification
Verification IP Nov 25, 2015 Jason Polychronopoulos Webinar
Creating UVM Testbenches for Simulation & Emulation Platform Portability
Acceleration Nov 24, 2015 Hans Van Der Schoot pdf
On-Chip Debug – Reducing Overall ASIC Development Schedule Risk
Debug Nov 01, 2015 Eric Rentschler - Siemens Eda Article

September 2015

New Low Power Verification Techniques
Low Power Sep 23, 2015 Ellie Burns Webinar

July 2015

Unleashing the Full Power of UPF Power States
Low Power Jul 17, 2015 pdf
New School Connectivity Checking
Formal Verification Jul 01, 2015 Mark Eslinger Webinar

June 2015

Understanding Low Power Impact on CDC Logic
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Describing Low Power Logic with UPF
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Integrating Power Aware CDC into a Design Flow
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Questa CDC Power Aware
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Formal and Assertion-Based Verification of MBIST MCPs
Assertions Jun 06, 2015 Ajay Daga - Fishtail Design Automation Article
Starting Formal Right from Formal Test Planning
Formal Verification Jun 06, 2015 Jin Zhang Article
Emulation Based Approach to ISO 26262 Compliant Processors Design
Functional Safety Jun 06, 2015 David Kaushinsky - Siemens Eda Article
AutoCheck: Push-Button Bug Hunting
Formal Verification Jun 05, 2015 Mark Eslinger Session
Connectivity Check: Connectivity Verification
Formal Verification Jun 05, 2015 Mark Eslinger Session
Questa AutoCheck
Formal Verification Jun 05, 2015 Mark Eslinger Demo
Questa Connectivity Check
Formal Verification Jun 05, 2015 Mark Eslinger Demo
CoverCheck: Accelerating Coverage Closure
Formal Verification Jun 05, 2015 Mark Eslinger Session
Questa CoverCheck
Formal Verification Jun 05, 2015 Mark Eslinger Demo
Register Check: Memory Mapped Register Verification
Formal Verification Jun 05, 2015 Mark Eslinger Session