Accelerating RTL Simulation Techniques
Long simulation run times are a bottleneck in the verification process. Coding style has a significant effect on simulation run times. Therefore, it is imperative that the code writer examine his/her code, not only by asking the question “does the code produce the desired output?” but also “is the code economical, and if not, what can be done to improve it?”
Full-access members only
Register your account to view Accelerating RTL Simulation Techniques
Full-access members gain access to our free tools and training, including our full library of articles, recorded sessions, seminars, papers, learning tracks, in-depth verification cookbooks, and more.