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September 2021 - Volume 17 Issue 2 (12)

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November 2018 - Volume 14 Issue 3 (4)

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July 2023 - Volume 19 Issue 2 (3)

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March 2017 - Volume 13 Issue 1 (2)

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December 2017 - Volume 13 Issue 3 (1)

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March 2015

MIPI LLI Verification using Questa Verification IP
Verification IP Mar 11, 2015 Verification Horizons Article
Merging SystemVerilog Covergroups by Example
Standards Mar 11, 2015 Verification Horizons Article
Hardware Emulation: Three Decades of Evolution
Acceleration Mar 11, 2015 Dr. Lauro Rizzatti - Rizzatti Llc Article
Evolving the Use of Formal Model Checking in SoC Design Verification
Formal Verification Mar 11, 2015 Ram Narayan Article
Small, Maintainable Tests
UVM - Universal Verification Methodology Mar 11, 2015 Ashley Winn - Sondrel Ic Design Services Article
Functional Coverage Development Tips: Do’s and Don'ts
Coverage Mar 11, 2015 Samrat Patel, Vipul Patel - Einfochips Article
UVM Connect 2.3.0 Kit
UVMC Mar 10, 2015 John Stickley tar
UVM Connect 2.3.0 Primer
UVMC Mar 10, 2015 John Stickley pdf

February 2015

UVM Connect 2.3 Kit
UVMC Feb 18, 2015 John Stickley tar

January 2015

Coverage Cookbook - Japanese Release
Coverage Jan 14, 2015 pdf

December 2014

Dealing With UVM and OVM Sequences
Standards Dec 29, 2014 Verification Horizons Article
Don't Forget the Little Things That Can Make Verification Easier
Simulation Dec 29, 2014 Verification Horizons Article
Introduction to Questa X-Check
Formal Verification Dec 20, 2014 Doug Smith Webinar
Cache Coherent Interface Verification IP
Simulation Dec 17, 2014 Verification Horizons Article
Power Aware Verification in Mixed-Signal Simulation
Low Power Dec 10, 2014 pdf

November 2014

Integrate Ethernet QVIP in a Few Hours: an A-to-Z Guide
Simulation Nov 20, 2014 Verification Horizons Article
Hey You, Design Engineer!
Analog Mixed-Signal Nov 20, 2014 Verification Horizons Article
Flexible UVM Components: Configuring Bus Functional Models
Standards Nov 19, 2014 Verification Horizons Article
NoC Generic Scoreboard VIP
Simulation Nov 19, 2014 Verification Horizons Article
Using Mentor Questa® for Pre-silicon Validation of IEEE 1149.1-2013 based Silicon Instruments
Simulation Nov 19, 2014 Verification Horizons Article
Introduction to Questa CDC
Clock-Domain Crossing Nov 12, 2014 Doug Smith Webinar
Four Best Practices for Prototyping MATLAB and Simulink Algorithms on FPGAs
Simulation Nov 11, 2014 Verification Horizons Article

October 2014

Questa Coverage Closure
Coverage Oct 22, 2014 Thomas Ellis Demo
Introduction to Questa CoverCheck
Formal Verification Oct 16, 2014 Doug Smith Webinar
Establishing a Company Wide Verification Reuse Library
UVM Framework Oct 15, 2014 Bob Oden Webinar

Debugging Webinar

Thursday, Apr 03rd-8:00 AM PDT

Accelerate Root Cause Analysis & Reduce Debug Turnaround Time with Questa VIQ Regression Navigator

PCIe Gen7 Webinar

Wednesday, Mar 26th-10:00 AM PDT

Accelerating Innovation: PCIe Gen7 Verification for High-Speed Designs

Simulation Webinar

Wednesday, Apr 16th-8:00 AM PDT

Faster Debug Using QuestaSim Interactive Coverage Analysis

FPGA Design Webinar

Wednesday, Apr 23rd-8:00 AM PDT

Securing your FPGA Design from RTL through to the Bitstream

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