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Questa Design Solutions Mar 10, 2022 Buu Huynh Webinar
UVM Framework Release 2022.1
UVM Framework Mar 09, 2022 Bob Oden tar
Verification of HPC Protocols and Memories
Verification IP Mar 08, 2022 Gordon Allan Webinar
Verification of HPC Protocols and Memories
Verification IP Mar 08, 2022 Gordon Allan pdf
NVMe-oF – Simple, Invisible Fabric to Cloud Storage
Verification IP Mar 02, 2022 Dhruv Garg - Siemens Eda Article
Getting to Know Visualizer - Part I
Debug Mar 02, 2022 Rich Edelman Article
Enabling Model-Based Design for DO-254 Certification Compliance
Functional Safety Mar 02, 2022 Jacob Wiltgen Article
How Do You “Qualify” Tools for DO-254 Programs?
Functional Safety Mar 02, 2022 Michelle Lange, Tammy Reeve - Patmos Engineering Services Article
Reflections on Users’ Experiences with SVA
SystemVerilog Mar 02, 2022 Ben Cohen Article
A Faster Approach to Co-Simulation Using Questa and VPI
Simulation Mar 02, 2022 Vicente Bergas, Andrew Robertson, Marco Denicolai - Bitec Article
UVVM – VHDL Verification Methodology for Faster and Better FPGA and ASIC Verification
VHDL 2008 Mar 02, 2022 Espen Tallaksen - Emlogic Article

February 2022

Equivalence Checking for FPGA
Formal Verification Feb 25, 2022 Martin Rowe Webinar
Achieving High Defect Coverage for Safety Critical and High Reliability Designs
Functional Safety Feb 22, 2022 Lee Harrison Webinar
‘The Dog Ate my RTL’ Doesn’t Work Anymore
Questa Design Solutions Feb 15, 2022 Joe Hupcey Webinar
‘The Dog Ate my RTL’ Doesn’t Work Anymore
Questa Design Solutions Feb 15, 2022 Joe Hupcey pdf
Controlling On-the-Fly-Resets in a UVM-Based AXI Testbench
Simulation Feb 02, 2022 Verification Horizons Article

January 2022

Introduction to Questa Lint and CDC for Designers
Questa Design Solutions Jan 25, 2022 Mathew Yee pdf
Introduction to Questa Lint and CDC for Designers
Questa Design Solutions Jan 25, 2022 Mathew Yee Webinar
Odds and Ends
Python Jan 14, 2022 Ray Salemi link

December 2021

Automated Formal-Based Apps - Improving Quality and Time-to-Market with Formal
Formal Verification Dec 20, 2021 Joe Hupcey Webinar
Logging in PYUVM
Python Dec 14, 2021 Ray Salemi link

FPU Webinar

Wednesday, Feb 05th-8:00 AM PST

Streamlining FPU Verification with an Alternative to C-reference Model Approaches

Functional Safety Webinar

Wednesday, Jan 29th-8:00 AM PST

An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

VA Live: Silicon Valley

Thursday, Jan 30th-9:30 AM PST

Verification IP for UCIe, PCIe Gen 7, HBM4, and more

Simulation Webinar

Wednesday, Jan 15th-8:00 AM PST

Unlocking the Power of QuestaSim and Visualizer Integration

Formal Security Webinar

Wednesday, Jan 22nd-8:00 AM PST

Explore How to Protect Against Data Corruption with Formal Security Verification

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