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September 2021 - Volume 17 Issue 2 (7)

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Show Less

September 2015

New School Thinking for Fast and Efficient Verification Using EZ-VIP
Verification IP Sep 02, 2015 Jason Polychronopoulos Webinar
New School Regression Control
Verification Management Sep 01, 2015 Darron May Webinar
Evolution of UPF: Getting Better All the Time
Standards Sep 01, 2015 Erich Marschner Article

August 2015

Evolution of Debug
Debug Aug 25, 2015 Gordon Allan Webinar

July 2015

Evolution of Debug
Debug Jul 28, 2015 Gordon Allan pdf
Accelerating RTL Simulation Techniques
Simulation Jul 23, 2015 Verification Horizons Article
UVM Sans UVM - An Approach to Automating UVM Testbench Writing
UVM - Universal Verification Methodology Jul 17, 2015 pdf
EZ Verification with Questa Verification IP
Verification IP Jul 06, 2015 Jason Polychronopoulos pdf
Automated Generation of Functional Coverage Metrics for Input Stimulus
Standards Jul 01, 2015 Verification Horizons Article
Successive Refinement: A Methodology for Incremental Specification of Power Intent
Standards Jul 01, 2015 Verification Horizons Article

June 2015

Power Aware CDC Introduction and Overview
Clock-Domain Crossing Jun 30, 2015 Kurt Takara Session
Verification Methodology Cookbooks
Standards Jun 29, 2015 Verification Methodology Team Cookbook
Debug Data API (DDA)
Debug Jun 19, 2015 Ellie Burns pdf
Industry Standards and FPGA Verification Trends
FPGA Verification Jun 19, 2015 Harry Foster pdf
An Agile Evolution in SoC Verification
Planning, Measurement and Analysis Jun 19, 2015 Neil Johnson pdf
Evolution Of Debug
Debug Jun 19, 2015 pdf
Next Generation Debug Experience with Visualizer
Debug Jun 19, 2015 Vahid Naraghi pdf
Trends in Debugging: Broad & Flexible Silicon Debug Visibility
Debug Jun 19, 2015 Stephen Bailey pdf
Trends in Debugging: From Challenges to Solutions
Debug Jun 19, 2015 Harry Foster pdf
Resolving the Limitations of a Traditional VIP for PHY Verification
Simulation Jun 06, 2015 Verification Horizons Article
Hardware Emulation: Three Decades of Evolution – Part II
Acceleration Jun 06, 2015 Verification Horizons Article
Reuse MATLAB® Functions and Simulink® Models in UVM Environments with Automatic SystemVerilog DPI Component Generation
Standards Jun 06, 2015 Verification Horizons Article
DO-254 Testing of High Speed FPGA Interfaces
Functional Safety Jun 06, 2015 Verification Horizons Article
Welcome to the DVCon 2015 issue of Verification Horizons
Simulation Jun 06, 2015 Verification Horizons Article
Automating the Capture of Assertion Verification Results for DO-254
Functional Safety Jun 06, 2015 Vipul Patel - Einfochips Article

Osmosis 2024

Thursday, October 17th | Holiday Inn City Centre | Munich, Germany

DVCon Europe 2024

October 15th -16th | Holiday Inn City Centre | Munich, Germany

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

VA Live Seminar

Wednesday, November 6th | TopGolf | Austin, Texas

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

Upcoming HBM4 Webinar

Wednesday, Oct 30th-9:00 AM PDT

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

Upcoming Questa Webinar

Wednesday, Nov 13th-8:00 AM PST

Simplify Scripting Environment using Qrun Capabilities in QuestaSim

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