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March 2014 - Volume 10 Issue 1 (4)

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February 2019 - Volume 15 Issue 1 (3)

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November 2018 - Volume 14 Issue 3 (3)

October 2012 - Volume 8 Issue 3 (3)

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December 2019 - Volume 15 Issue 3 (2)

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March 2015 - Volume 11 Issue 1 (2)

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December 2017 - Volume 13 Issue 3 (1)

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January 2017

Weathering the Verification Storm: Methodology Enhancements used on a Next Generation Weather Satellite C&DH Program
Standards Jan 03, 2017 Mike Horn Article
Equivalence Validation of Analog Behavioral Models
Analog Mixed-Signal Jan 03, 2017 Verification Methodology Team Article
Interpreting UPF For A Mixed-Signal Design Under Test
Standards Jan 03, 2017 Verification Methodology Team Article
Using Test-IP Based Verification Techniques in a UVM Environment
Standards Jan 03, 2017 Verification Methodology Team Article
Is Your Power Aware Design Really X-Aware?
Simulation Jan 03, 2017 Verification Methodology Team Article
Stepping into UPF 2.1 World: Easy Solution to Complex Power Aware Verification
Standards Jan 03, 2017 Verification Methodology Team Article
So You Think You Have Good Stimulus: System-Level Distributed Metrics Analysis and Results
Simulation Jan 03, 2017 Andreas Meyer Article
Are You Really Confident That You Are Getting the Very Best From Your Verification Resources?
Verification Management Jan 03, 2017 Darron May Article
Bringing Regression Systems into the 21st Century
Verification Management Jan 03, 2017 Thom Ellis Article

December 2016

Jenkins Tutorial - Setup, Install, Configuration
Planning, Measurement and Analysis Dec 23, 2016 Darron May pdf
JUnit Plugin (required)
Planning, Measurement and Analysis Dec 23, 2016 link
Questa VRM
Planning, Measurement and Analysis Dec 23, 2016 Darron May link
Jenkins Release
Planning, Measurement and Analysis Dec 23, 2016 link
Dashboard View (optional)
Planning, Measurement and Analysis Dec 23, 2016 link
Verifying Display Standards – A Comprehensive UVM-based Verification IP Solution
Verification IP Dec 19, 2016 Saumya Agrawal pdf
How to Shorten Your Schedule with Interactive Formal Debug and Design Exploration
Formal Verification Dec 05, 2016 Mark Eslinger Webinar

November 2016

Industry Trends in Today’s Functional Verification Landscape
Planning, Measurement and Analysis Nov 11, 2016 Harry Foster Webinar
Enterprise Debug for Formal
Formal Verification Nov 11, 2016 Joe Hupcey Webinar
Enterprise Debug for Simulation and Formal
Debug Nov 11, 2016 Moses Satyasekaran Seminar
How to Get the Maximum Out of Your Assertion and Coverage Based Verification Methodology
Assertions Nov 07, 2016 Nitish Goel - Siemens Eda Article
USB Type-C Verification: Challenges & Solution
Verification IP Nov 07, 2016 Suraj Parkash Gupta, Zeeshan Yousuf - Siemens Eda Article
Power Aware Libraries: Standardization and Requirements for Questa Power Aware
Low Power Nov 07, 2016 Progyna Khondkar Article
Improving Performance and Verification of a System Through an Intelligent Testbench
Simulation Nov 07, 2016 Umesh Patel, Dhaval Shah - Arastu Systems Pvt. Ltd. Article

October 2016

Functional Verification Study - 2016
Planning, Measurement and Analysis Oct 14, 2016 Harry Foster Session

August 2016

Extending a Traditional VIP to Solve PHY Verification Challenges
Verification IP Aug 26, 2016 pdf

New White Papers!

Formal, Avery VIP, Coverage, UPF, Functional Safety and More!

QuestaSim Webinar

Wednesday, Oct 01st-8:00 AM PDT

Did You Know QuestaSim Supports VHDL-2019?

Questa Developer Webinar

Wednesday, Oct 08th-8:00 AM PDT

Breaking Silos: Creating Synergetic Flows for Next-Gen Verification

UALink VIP Webinar

Wednesday, Oct 15th-8:00 AM PDT

Ultra Accelerator Link (UALink) Verification: A Deep Dive with Siemens Avery VIP

osmosis Europe 2025

Thursday, October 16th, 2025 - Munich, DE

Simulation Webinar

Thursday, Oct 23rd-8:00 AM PDT

Improving Verification Productivity Using Questa One Sim

User2User Mid-Atlantic 2025

Nov. 19th | 0800 - 1630 US/Eastern

Johns Hopkins University | Laurel, Maryland

DV Digest on YouTube

AI is Changing Verification | Interview with Abhi Kolpekwar

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