Search Results

99 Results

• Mamma Benmoussa Garsault - Arcys

  Resource (Interview) - Nov 16, 2023 by Mamma Benmoussa Garsault - Arcys

  Presenter Mamma Benmoussa Garsault on the value of interactive presentations and discussions with other formal practitioners.

• Combined formal and functional verification approach for digitally controlled analog frontend

  Resource (Slides (.PDF)) - Nov 16, 2023 by Mihajlo Katona - Veriest

• Limits of verification: learnings from catastrophic system failures

  Resource (Recording) - Nov 16, 2023 by Philippe Luc - Codasip

• How formal methods could banish the ghosts that haunt our computing systems

  Resource (Slides (.PDF)) - Nov 16, 2023 by Prof. Wolfgang Kunz - RPTU

• Prof. Wolfgang Kunz - RPTU & Tobias Ludwig - Lubis EDA

  Resource (Interview) - Nov 16, 2023 by Prof. Wolfgang Kunz of RPTU and Tobias Ludwig of Lubis EDA

  Presenters Prof. Wolfgang Kunz of RPTU and Tobias Ludwig of Lubis EDA on future trends and applications of formal verification.

• Hierarchical verification flow for FPGA design projects

  Resource (Recording) - Nov 16, 2023 by Mamma Benmoussa Garsault - Arcys

• How to sign-off cryptographic hash implementations with generated formal assertions

  Resource (Recording) - Nov 16, 2023 by Tobias Ludwig - Lubis EDA

• Debugging enhancements for formal property checking

  Resource (Recording) - Nov 16, 2023 by Holger Busch - Infineon

• osmosis 2023

  Conference - Nov 16, 2023 by Nicolae Tusinschi

  osmosis is about sharing success in using formal techniques to solve verification challenges, and networking with our R&D experts and other attendees.

• Using Formal Technology for Secure IP Integration

  Resource (Slides (.PDF)) - Jun 14, 2023 by John Hallman

• Update on Formal-based Trust and Security Verification Flows

  Resource (Slides (.PDF)) - Jun 14, 2023 by John Hallman

• Securing RISC-V Military Projects

  Resource (Slides (.PDF)) - Jun 14, 2023 by Christopher Diltz, Edaptive Computing, Inc.

• TSS SoC Sign-Off Methodology: Quality & Productivity Gains

  Resource (Slides (.PDF)) - Jun 14, 2023 by Dr. Vasker Bhattacherjee - Edaptive Computing, Inc.

• Formal Verification of Security Properties

  Resource (Slides (.PDF)) - Jun 14, 2023 by Ratish Punnoose - Sandia National Laboratories

• OneSpin EC-FPGA: Evolution and Updates

  Resource (Slides (.PDF)) - Jun 14, 2023 by Kevin Urish

  In this session, you will learn how OneSpin EC-FPGA accelerates the design flow and identifies bugs before they escape by enabling aggressive optimization usage.

• Siemens Government Technologies and Microelectronics Assurance

  Resource (Slides (.PDF)) - Jun 14, 2023 by Justin Brisco - Siemens Government Technologies

• osmosis Aerospace and Defense 2023

  Conference - May 30, 2023 by Martin Rowe

  osmosis Aerospace and Defense (A&D) is about sharing the success in using formal techniques to address the demanding verification requirements and challenges of Trust and Assurance verification, Safety Critical Designs, and DO-254 compliant and other high-consequence systems.

• Formal Verification of Security Properties

  Resource (Recording) - Dec 08, 2022 by Ratish Punnoose - Sandia National Laboratories

• Formal Verification of Security Properties

  Resource (Slides (.PDF)) - Dec 08, 2022 by Ratish Punnoose - Sandia National Laboratories

• Harry Foster - Siemens EDA

  Resource (Interview) - Dec 08, 2022 by Harry Foster

  Interview with Harry Foster of Siemens EDA about the surprising results from the 2022 Wilson Research Study and Osmosis' presentations.

• Holger Busch - Infineon

  Resource (Interview) - Dec 08, 2022 by Holger Busch - Infineon

  Interview with Holger Busch of Infineon about the origins of formal and how the presentations at Osmosis show how far formal verification has come.

• Katharina Ceesay-Seitz - ETH Zurich

  Resource (Interview) - Dec 08, 2022 by Katharina Ceesay-Seitz

  Interview with Katharina Ceesay-Seitz of ETH Zurich about the value of attending Osmosis.

• Philippe Luc - Codasip

  Resource (Interview) - Dec 08, 2022 by Philippe Luc - Codasip

  Interview with Philippe Luc of Codasip about his presentation on How formal lights up your RISC-V verification avenue .

• Saranyu Chattopadhyay - Stanford University

  Resource (Interview) - Dec 08, 2022 by Saranyu Chattopadhyay

  Interview with Saranyu Chattopadhyay of Stanford University about his presentation on Accelerator quick error detection: Verification of hardware accelerators .

• The State of Functional Verification: Crisis or Opportunity?

  Resource (Slides (.PDF)) - Dec 08, 2022 by Harry Foster