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Solutions

The Verification Academy Solutions section delivers focused insights into key market segments and verification products that address today’s emerging challenges. Explore how advanced technologies and methodologies—spanning functional verification, safety, security, and more—are applied to solve real-world design problems. This curated content brings together best practices, expert perspectives, and proven tools to accelerate verification success.
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Accelerating DFT Sign-Off with Questa One

Tackling Emerging DFT Verification Challenges with Questa One

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Functional Safety for ISO 26262

Functional Safety for DO-254

Unified Coverage

Questa One Unified Coverage Solution: Transforming Verification Through Intelligence

Boost Your Verification Productivity with Questa Verification IQ

Coverage Closure Acceleration Using Collaborative Verification IQ Tool

Verification Threading

Questa One VeriThreader: Rethinking Verification Traceability for Modern Systems

Functional Safety for ISO 26262

Accelerated Assurance with Questa One Functional Safety

Functional Safety for DO-254

Introduction to DO-254
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The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.
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Verification IQ

Verification IP

Verification Planning

UVM

Functional Verification of Digital Logic

Introduction to UVM

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UVM Debug

Advanced UVM

SystemVerilog

SystemVerilog OOP for UVM Verification

Improving Your SystemVerilog Language and UVM Methodology Skills

An Introduction to Unit Testing with SVUnit
Cookbooks

Find all the methodology you need in this comprehensive and vast collection. The UVM and Coverage Cookbooks contain dozens of informative, executable articles covering all aspects of UVM and Coverage.
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UVM Testbench Acceleration through Co-Emulation

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An End-to-End Functional Safety Solution for Automotive ICs Based on ISO 26262

Union of SoC Design & Functional Safety FlowUnion of SoC Design & Functional Safety Flow

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Simulating CDC Reconvergence: Validating Robustness with Questa One Sim's Metastability Injection

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Breaking Bandwidth Barriers in the AI Era: Scaling PCIe with Retimers and Optical Innovation

Shift-Left Compute Subsystem RTL Sign-Off with Software Aware VIP

Securing Next-Generation Interconnects: PCIe® Gen7 Security Verification

Ultra Accelerator Link (UALink) Verification: A Deep Dive with Siemens Avery Verification IP

Breaking Barriers: Ethernet 1.6T, Infiniband, UALink, and UEC Verification for Next-Gen Connectivity

PCIe Gen7 Verification with Siemens Avery Verification IP

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

The Future of Multi-Die System Verification with UCIe

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From Apps to Orchestration: Agentic AI for Autonomous RTL Signoff with Questa One Agentic Toolkit

Streamlining Requirements Traceability using Questa Verification IQ Testplan Author

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Boost Your Verification Productivity with Questa Verification IQ

Questa Verification IQ: Boost Verification Predictability and Efficiency with Big Data

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Solving the Semiconductor Verification Crisis: From Problem to Productivity

Functional Verification Study - 2022

The Three Pillars of Intent-Focused Insight

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March 2018

UVM Sequences
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
UVM Configuration Database
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
Handling Parameterization
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
Virtual Interface BFMs
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
Abstract-Concrete Class Connections
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
Connecting the Testbench to the DUT
UVM - Universal Verification Methodology Mar 15, 2018 Vm Team Chapter
Messaging in Sequences
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
Messaging
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
UVM Report Catcher
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
Command-Line Verbosity Control
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
Testing Message Status
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
Using Messaging
UVM - Universal Verification Methodology Mar 12, 2018 Verification Methodology Team Chapter
Complex Address Maps
UVM - Universal Verification Methodology Mar 09, 2018 Verification Methodology Team Chapter
Accellera UVM 1.2 Summary
UVM - Universal Verification Methodology Mar 09, 2018 Verification Methodology Team Chapter

February 2018

UVM and C Tests: Perfect Together
UVM - Universal Verification Methodology Feb 26, 2018 Rich Edelman pdf
UVM and C Tests: Perfect Together
UVM - Universal Verification Methodology Feb 26, 2018 Rich Edelman Paper

November 2017

Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Rich Edelman Paper
Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Rich Edelman pdf

September 2017

Visualizer Tutorials: UVM Interactive
UVM - Universal Verification Methodology Sep 05, 2017 pdf
Visualizer Tutorials: UVM Interactive Lab
UVM - Universal Verification Methodology Sep 05, 2017 pdf

July 2017

Accelerating UVM-based Verification from Simulation to Emulation
UVM - Universal Verification Methodology Jul 24, 2017 pdf

June 2017

Automation and Reuse in RISC-V Verification Flow
UVM - Universal Verification Methodology Jun 28, 2017 Marcela Zachariasova, Lubos Moravec - Codasip, Ltd. Article
Migrating to UVM 1800.2
UVM - Universal Verification Methodology Jun 24, 2017 Verification Methodology Team Chapter
UVM Debug
UVM - Universal Verification Methodology Jun 14, 2017 Tom Kiley Track
UVM Debug Editor Insight
UVM - Universal Verification Methodology Jun 14, 2017 Harry Foster pdf

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