UVM Debug
In this track, we examine common UVM debug issues, and provide a systematic set of recommendations to effectively address them.
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Sessions
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UVM Debug Editor Insight
This editor insight session provides an historical perspective on the origin of the word debugging, followed by a discussion on industry trends that motivated us to create the UVM debug track. -
UVM Connectivity Debug
In this session we will discuss how to debug connectivity issues between UVM components using the UVM Schematic viewer. -
UVM Phase Debug
In this session we will provide an overview of UVM phases, some of the common issues that users run into, and methods to effectively debug them. -
Memory Leak Debug
In this session we will describe what a memory leak is in a UVM environment and how to effectively debug the issue. -
UVM Configuration Database Debug
In this session we will provide an overview of the UVM configuration database, discuss some of the common issues with configurations, and methods to debug them.
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Overview
Design complexity continues to increase, which is contributing to new challenges in verification and debug. Fortunately, new solutions and methodologies (such as UVM) have emerged to address growing design complexity. Yet, even with the productivity gains that can be achieved with the adoption of UVM, newer debugging challenges specifically related to UVM need to be addressed.
In this track, we examine common UVM debug issues, and provide a systematic set of recommendations to effectively address them.
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Forum Discussion - UVM Debug