Browse all Papers in Siemens Verification Academy
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February 2018
November 2017
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Go Figure – UVM Configure: the Good, the Bad, the Debug
UVM - Universal Verification Methodology Nov 10, 2017 Paper
October 2017
March 2017
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Free Yourself from the Tyranny of Power State Tables with Incrementally Refinable UPF
Low Power Mar 20, 2017 Paper -
Increased Regression Efficiency with Jenkins Continuous Integration Before You Finish Your Morning Coffee
Verification Management Mar 13, 2017 Paper
February 2017
December 2016
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Five Common Pitfalls to Avoid While Verifying PCIe® Based NVMe Controllers
Verification IP Dec 19, 2016 Paper -
The Fundamental Power States for UPF Modeling and Power Aware Verification
Low Power Dec 14, 2016 Paper
August 2016
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Power Aware CDC Verification of Dynamic Frequency and Voltage Scaling (DVFS) Artifacts
Clock-Domain Crossing Aug 26, 2016 Paper
March 2016
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Verifying Display Standards: A Comprehensive UVM-based Verification IP Solution
Verification IP Mar 12, 2016 Paper -
Slaying the UVM Reuse Dragon: Issues and Strategies for Achieving UVM Reuse
UVM Framework Mar 01, 2016 Paper
February 2016
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Whose Fault is It? Advanced Techniques for Optimizing ISO 26262 Fault Analysis
Functional Safety Feb 28, 2016 Paper
December 2015
September 2015
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Beyond UVM Registers: Better, Faster, Smarter
UVM - Universal Verification Methodology Sep 10, 2015 Paper
March 2015
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Samsung: Clock-Domain Crossing Aware Sequential Clock Gating
Clock-Domain Crossing Mar 15, 2015 Paper -
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Are You Smarter Than Your Testbench? With a Little Work You Can Be
UVM - Universal Verification Methodology Mar 03, 2015 Paper -
UVM Sans UVM: An Approach to Automating UVM Testbench Writing
UVM - Universal Verification Methodology Mar 02, 2015 Paper
March 2014
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Are You Really Confident That You Are Getting the Very Best From Your Verification Resources?
Verification Management Mar 06, 2014 Paper -
February 2013
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Boost Verification Results by Bridging the Hardware/Software Testbench Gap
UVM - Universal Verification Methodology Feb 27, 2013 Paper