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September 2021 - Volume 17 Issue 2 (7)

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Show Less

September 2023

UVM Framework Release 2023.3
UVM Framework Sep 08, 2023 Bob Oden tar
Digital Transformation: How Siemens EDA Helps You Engineer a Smarter Future Faster
Machine Learning Sep 02, 2023 Mike Santarini - Siemens Eda pdf

June 2023

Whoops There Goes Another Config
Debug Jun 21, 2023 Rich Edelman Article
Robustness Verification of ARINC708’s Manchester Codes in a DO-254 Project
Functional Safety Jun 21, 2023 Emin Akgün, Hilal Güneren - Ankasys Article
Siemens Government Technologies and Microelectronics Assurance
Formal Verification Jun 14, 2023 Justin Brisco - Siemens Government Technologies pdf

April 2023

Groups of Class Specializations in SystemVerilog
SystemVerilog Apr 25, 2023 Chris Spear link

March 2023

The Digital Twin: An Aerospace and Defense Revolution
Functional Safety Mar 29, 2023 Ray Salemi Session
Practical Flows for Continuous Integration: Making The Most of Your EDA Tools
Questa Design Solutions Mar 16, 2023 Neil Johnson Webinar
Introduction to SystemVerilog Assertions
SystemVerilog Mar 15, 2023 Chris Crile Webinar
Rapid Testbench Development
UVM Framework Mar 07, 2023 Bob Oden pdf

February 2023

Big Data Reimagines Verification Predictability and Efficiency
Planning, Measurement and Analysis Feb 24, 2023 Darron May Article
Democratizing Digital-Centric Mixed-Signal Verification Methodologies
Analog Mixed-Signal Feb 24, 2023 Sumit Vishwakarma Article
Lane Margining at Receiver and its Application Through Pipe Message Bus
Verification IP Feb 24, 2023 Sachin Mishra Article
The RISC-V Verification Interface (RVVI) – Test Infrastructure and Methodology Guidelines
Verification IP Feb 24, 2023 Aimee Sutton, Lee Moore, Kevin Mcdermott - Imperas Software Article
Jumpstart your Formal Verification with a Little Help
Formal Verification Feb 24, 2023 Doug Smith Article
Resolving Metastability Issues for Multi-clock SoC Environment for I2C
Clock-Domain Crossing Feb 24, 2023 Priyanka Changan, Darshan Sarode, Avnita Pal, Priyanka Gharat - Silicon Interfaces Article
Simulating UVMF Code on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman Session
Simulating UVMF Code on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman pdf
Generating UVMF Code on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman Session
Generating UVMF Code on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman pdf
Installing Python on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman Session
Installing Python on Windows
UVM Framework Feb 20, 2023 Graeme Jessiman pdf
UVMF Build/Compile/Run Script Introduction
UVM Framework Feb 20, 2023 Jonathan Craft Session
UVMF Build/Compile/Run Script
UVM Framework Feb 20, 2023 Jonathan Craft pdf
Register Adapters, Predictors, and Tests
UVM Framework Feb 20, 2023 Nick Galvan pdf

Osmosis 2024

Thursday, October 17th | Holiday Inn City Centre | Munich, Germany

DVCon Europe 2024

October 15th -16th | Holiday Inn City Centre | Munich, Germany

New UVMF Release

The UVM Framework (UVMF) provides a jump-start for learning UVM and building UVM verification environments.

VA Live Seminar

Wednesday, November 6th | TopGolf | Austin, Texas

Missing Forum Notifications?

Check out this blog post from Dave Rich on how to enable Forum Notifications.

Upcoming HBM4 Webinar

Wednesday, Oct 30th-9:00 AM PDT

Verifying the Next Generation High Bandwidth Memory Controllers for AI and HPC Applications

Upcoming Questa Webinar

Wednesday, Nov 13th-8:00 AM PST

Simplify Scripting Environment using Qrun Capabilities in QuestaSim

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