WHAT IS PORTABLE STIMULUS?
Over the past few years, lots of energy has been invested in improving the productivity and quality-of-results of design verification. The bulk of this effort has focused on techniques that are most applicable at the block level. These techniques — such as constrained-random transaction generation, functional coverage, and the UVM — have had a dramatic positive improvement on verification quality and productivity. However, while these techniques have been successful at the block level, verification continues to be increasingly challenging at the subsystem and SoC levels, and thus a new approach is called for.
Both commercial and in-house tools have been developed to improve the productivity and efficiency of