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    The Verification Academy offers users multiple entry points to find the information they need. One of these entry points is through Topic collections. These topics are industry standards that all design and verification engineers should recognize. While we continue to add new topics, users are encourage to further refine collection information to meet their specific interests.

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    The Verification Academy is organized into a collection of free online courses, focusing on various key aspects of advanced functional verification. Each course consists of multiple sessions—allowing the participant to pick and choose specific topics of interest, as well as revisit any specific topics for future reference. After completing a specific course, the participant should be armed with enough knowledge to then understand the necessary steps required for maturing their own organization’s skills and infrastructure on the specific topic of interest. The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization’s processes so that you can then reap the benefits that advanced functional verification offers.

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    No one argues that the challenges of verification are growing exponentially. What is needed to meet these challenges are tools, methodologies and processes that can help you transform your verification environment. These recorded seminars from Verification Academy trainers and users provide examples for adoption of new technologies and how to evolve your verification process.

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    The Verification Academy will provide you with a unique opportunity to develop an understanding of how to mature your organization's processes so that you can then reap the benefits that advanced functional verification offers.

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  • Home
  • Verification Horizons
  • June 2018
  • Part 2: Power Aware Static Verification – From Power Intent to Microarchitectural Checks of Low-Power Designs

Part 2: Power Aware Static Verification – From Power Intent to Microarchitectural Checks of Low-Power Designs

Verification Horizons - Tom Fitzpatrick, Editor

Power Aware Static Verification – From Power Intent to Microarchitectural Checks of Low-Power Designs Progyna Khondkar - Mentor, A Siemens Business

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INTRODUCTION

Part Iof this article provided a consolidated approach to understand verification tools and methodologies that applies a set of pre-defined power aware (PA) or multi-voltage (MV) rules based on the power requirements, statically on the structures of the design. More precisely, the rule sets are applied on the physical structure, architecture, and microarchitecture of the design, in conjunction with the UPF specification but without the requirements of any external stimulus or testbenches. This actually makes the PA-Static tool simpler and a popular choice to verify various features of UPF strategies (e.g., UPF strategy definitions are correct, incorrect, missing, or redundant, MV cells are correct, incorrect, missing, or

...

Table of Contents

Verification Horizons Articles:

  • A College Championship, Our NBA Finals Expectations, and Dreaded Feature Creep

  • Comprehensive CDC Verification with Advanced Hierarchical Data Models

  • Creating SoC Integration Tests with Portable Stimulus and UVM Register Models

  • It’s Not My Fault! How to Run a Better Fault Campaign Using Formal

  • Coverage Driven Verification of NVMe Using Questa® VIP (QVIP)

  • Part 2: Power Aware Static Verification – From Power Intent to Microarchitectural Checks of Low-Power Designs

  • Three Main Components to Look for in Your Emulation Platform

  • Complex Addressable Registers in Mission Critical Applications

  • RTL Glitch Verification

  • UVM-based Verification of a RISC-V Processor Core Using a Golden Predictor Model and a Configuration Layer

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