Welcome to part 2 of our overview of the Visualizer Debug Environment, the user interface to debug, analyze and verify all our Siemens functional verification tools.
As we saw in part 1, Visualizer is first and foremost a waveform debugger, with a host of other powerful debug capabilities also provided and supporting Verilog, SystemVerilog, VHDL, System C and C/C++. In this part of the article, we’ll look at driver tracing, X tracing, schematics, glitch debug, low power debug and coverage analysis and coverage debug – all It supports debugging simulation with Questasim, emulation with Veloce and prototyping with VPS.
Visualizer supports live simulation debug and post simulation debug.
Driver Tracing by Double Clicking